Computer-aided design of analog and mixed-signal integrated circuits von Gielen, G.G.E., Rutenbar, R.A.

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Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search von Phelps, R., Krasnicki, M., Rutenbar, R.A., Carley, L.R., Hellums, J.R.

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Why Quasi-Monte Carlo is Better Than Monte Carlo or Latin Hypercube Sampling for Statistical Circuit Analysis von Singhee, A, Rutenbar, R A

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Statistical Blockade: Very Fast Statistical Simulation and Modeling of Rare Circuit Events and Its Application to Memory Design von Singhee, A., Rutenbar, R.A.

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Hierarchical Modeling, Optimization, and Synthesis for System-Level Analog and RF Designs von Rutenbar, Rob A., Gielen, Georges G. E., Roychowdhury, Jaijeet

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Reducing power by optimizing the necessary precision/range of floating-point arithmetic von Tong, J.Y.F., Nagle, D., Rutenbar, R.A.

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Addressing substrate coupling in mixed-mode ICs: simulation and power distribution synthesis von Stanisic, B.R., Verghese, N.K., Rutenbar, R.A., Carley, L.R., Allstot, D.J.

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Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS von Calhoun, Benton H., Cao, Yu, Li, Xin, Mai, Ken, Pileggi, Lawrence T., Rutenbar, Rob A., Shepard, Kenneth L.

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Fast interval-valued statistical modeling of interconnect and effective capacitance von Ma, J.D., Rutenbar, R.A.

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A comparative study of two Boolean formulations of FPGA detailed routing constraints von Nam, G.-J., Aloul, F., Sakallah, K.A., Rutenbar, R.A.

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Synthesis of high-performance analog circuits in ASTRX/OBLX von Ochotta, E.S., Rutenbar, R.A., Carley, L.R.

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Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits von Wangyang Zhang, Xin Li, Liu, F., Acar, E., Rutenbar, R. A., Blanton, R. D.

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FPGA routing and routability estimation via Boolean satisfiability von Wood, R.G., Rutenbar, R.A.

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A new FPGA detailed routing approach via search-based Boolean satisfiability von Gi-Joon Nam, Sakallah, K.A., Rutenbar, R.A.

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Two Fast Methods for Estimating the Minimum Standby Supply Voltage for Large SRAMs von Jiajing Wang, Singhee, A, Rutenbar, R A, Calhoun, B H

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Efficient handling of operating range and manufacturing line variations in analog cell synthesis von Mukherjee, T., Carley, L.R., Rutenbar, R.A.

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Efficient Spatial Pattern Analysis for Variation Decomposition Via Robust Sparse Regression von Wangyang Zhang, Balakrishnan, K., Xin Li, Boning, D. S., Saxena, S., Strojwas, A., Rutenbar, R. A.

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Wire packing - a strong formulation of crosstalk-aware chip-level track/layer assignment with an efficient integer programming solution von Kay, R., Rutenbar, R.A.

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KOAN/ANAGRAM II: new tools for device-level analog placement and routing von Cohn, J.M., Garrod, D.J., Rutenbar, R.A., Carley, L.R.

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OASYS: a framework for analog circuit synthesis von Harjani, R., Rutenbar, R.A., Carley, L.R.

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