Ta/CoFeB/MgO analysis for low power nanomagnetic devices von Riente, F., Mendisch, S., Gnoli, L., Ahrens, V., Roch, M. Ruo, Becherer, M.

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EE-BESD: molecular FET modeling for efficient and effective nanocomputing design von Zahir, A., Pulimeno, A., Demarchi, D., Roch, M. Ruo, Masera, G., Graziano, M., Piccinini, G.

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D-Net: a laboratory prototype of a deflection network von Albertengo, G., Lo Cigno, R., Masera, G., Panizzardi, G., Ruo Roch, M.

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A 50 Mbit/s iterative turbo-decoder von Viglione, F., Masera, G., Piccinini, G., Ruo Roch, R., Zamboni, M.

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AI-Based Sound Event Detection on IoT Nodes: Requirements Evaluation von Errico, D., Re, M., Colombo, V., Cardarilli, G. C., Martina, M., Roch, M. Ruo

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A high accuracy-low complexity model for CMOS delays von Casu, M.R., Masera, G., Piccinini, G., Ruo Roch, M., Zamboni, M.

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Bitmap Index: A Processing-in-Memory Reconfigurable Implementation von Andrighetti, M., Turvani, G., Santoro, G., Vacca, M., Ruo Roch, M., Graziano, M., Zamboni, M.

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A CMOS power-delay model for CAD optimization tools von Delaurenti, M., Masera, G., Piccinini, G., Ruo Roch, M., Zamboni, M.

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Comparative analysis of PD-SOI active body-biasing circuits von Casu, M.R., Masera, G., Piccinini, G., Ruo Roch, M., Zamboni, M.

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Proxima: Prolog Execution Machine von Iurlaro, A., Masera, G., Pagni, A., Piccinini, G., Ruo Roch, M.

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Power supply wires self-heating analysis von Casu, M., Graziano, M., Roch, M.R., Viglione, F.

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A statistical noise-tolerance analysis and test structure for logic families von Graziano, M., Masera, G., Piccinini, G., Ruo Roch, M., Zamboni, M.

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Pandora-a microprogrammable node for DSP oriented architectures von Piccinini, G., Roch, M.R., Zamboni, M.

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The architecture of a high speed switch for deflection networks von Albertengo, G., Lo Cigno, R., Masera, G., Panizzardi, G., Ruo Roch, M.

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PROXIMA: an integrated Prolog machine von Civera, P.L., Masera, G., Ortelli, S., Piccinelli, P., Piccinini, G.L., Poluzzi, R., Roch, M. Ruo

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Quantum Dot Cellular Automata Check Node Implementation for LDPC Decoders von Awais, M., Vacca, M., Graziano, M., Roch, M. R., Masera, G.

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A Case Study for NoC-Based Homogeneous MPSoC Architectures von Tota, S.V., Casu, M.R., Roch, M.R., Macchiarulo, L., Zamboni, M.

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VLSI architectures for turbo codes von Masera, G., Piccinini, G., Roch, M.R., Zamboni, M.

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A Compact Continuous Analyzer of Particulate Matter Radioactivity von Riboldi, Christian, Crafa, Daniele M., Fiorini, Carlo, Carminati, Marco

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A Deeply Quantized Classifier for Very Low Resolution ToF Imaging von Pietro Pau, Danilo, Yahmed, Welid Ben, Raynor, Jeffrey M.

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