Use of Wafer Applied Underfill for 3D Stacking von LA MANNA, Antonio, REBIBIS, K. J, GERETS, C, BEYNE, E

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3D chip package interaction thermo-mechanical challenges: Proximity effects of Through Silicon vias and μ-bumps von Guo, W., Van Der Plas, G., Ivankovic, A., Eneman, G., Cherman, V., De Wachter, B., Mercha, A., Gonzalez, M., Civale, Y., Redolfi, A., Buisson, T., Jourdan, A., Vandevelde, B., Rebibis, K. J., De Wolf, I., La Manna, A., Beyer, G., Beyne, E., Swinnen, B.

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Challenges and improvements for 3D-IC integration using ultra thin (25μm) devices von La Manna, A., Buisson, T., Detalle, M., Rebibis, K. J., Velenis, D., Zhang, W., Beyne, E.

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Use of Wafer Applied Underfill for 3D Stacking von La Manna, Antonio, Rebibis, K. J., Gerets, C., Beyne, E.

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Thermo-mechanical impact of the underfill-microbump interaction in 3D stacked integrated circuits von Ivankovic, A., Vandevelde, B., Rebibis, K. J., La Manna, A., Van der Plas, G., Cherman, V., Beyne, E., De Wolf, I., Vandepitte, D.

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Wafer applied and no flow underfill screening for 3D stacks von Rebibis, K. J., Gerets, C., Capuz, G., Daily, R., Wang, T., LaManna, A., Duval, F., Miller, A., Guino, R., Peddi, R., Beyne, E., Swinnen, B.

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Small Pitch Micro-Bumping and Experimental Investigation for Under Filling 3D Stacking von La Manna, Antonio, Rebibis, K. J., De Vos, J., Bogaerts, L., Gerets, C., Beyne, E.

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Underfill material screening and process characterization for 3D stacking von Rebibis, K. J., LaManna, A., Gerets, C., Wang, T., Daily, R., Capuz, G., Miller, Andy, Beyne, E., Swinnen, B.

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3D stacking using ultra thin dies von La Manna, A., Velenis, D., Buisson, T., Detalle, M., Rebibis, K. J., Zhang, W., Beyne, E.

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3D stacking using Cu-Cu direct bonding von Hu, Y. H., Liu, C. S., Lii, M. J., Rebibis, K. J., Jourdain, A., Manna, A. L., Beyer, G., Beyne, E., Yu, C. H.

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3D stacking using Cu-Cu direct bonding for 40um pitch and beyond von Hu, Y. H., Liu, C. S., Lii, M. J., Manna, A. La, Rebibis, K. J., Zhao, M., Beyne, E., Yu, C.H.

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Cu-Cu hybrid bonding as option for 3D IC stacking von Hu, Y. H., Liu, C. S., Lii, M. J., Rebibis, K. J., Jourdain, A., La Manna, A., Beyne, E., Yu, C. H.

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Exposed Die-Top Encapsulation Molding for an Improved High- Performance Flip Chip BGA Package von Chong, D.Y.R., Lim, B.K., Rebibis, K.J., Pan, S.J., Sivalingam, K., Kapoor, R., Sun, A.Y.S., Tan, H.B.

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Process development to enable die sorting and 3D IC stacking von La Manna, A., Daily, R., Capuz, G., De Vos, J., Rebibis, K., Bogaerts, L., Miller, A., Beyne, E.

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