Haswell: The Fourth-Generation Intel Core Processor von Hammarlund, Per, Martinez, Alberto J., Bajwa, Atiq A., Hill, David L., Hallnor, Erik, Jiang, Hong, Dixon, Martin, Derr, Michael, Hunsaker, Mikal, Kumar, Rajesh, Osborne, Randy B., Rajwar, Ravi, Singhal, Ronak, D'Sa, Reynold, Chappell, Robert, Kaushik, Shiv, Chennupaty, Srinivas, Jourdan, Stephan, Gunther, Steve, Piazza, Tom, Burton, Ted

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The Impact of Performance Asymmetry in Emerging Multicore Architectures von Balakrishnan, Saisanthosh, Rajwar, Ravi, Upton, Mike, Lai, Konrad

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Haswell: A Family of IA 22 nm Processors von Kurd, Nasser, Chowdhury, Muntaquim, Burton, Edward, Thomas, Thomas P., Mozak, Christopher, Boswell, Brent, Mosalikanti, Praveen, Neidengard, Mark, Deval, Anant, Khanna, Ashish, Chowdhury, Nasirul, Rajwar, Ravi, Wilson, Timothy M., Kumar, Rajesh

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Continual flow pipelines von Srinivasan, Srikanth T., Rajwar, Ravi, Akkary, Haitham, Gandhi, Amit, Upton, Mike

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Virtualizing Transactional Memory von Rajwar, Ravi, Herlihy, Maurice, Lai, Konrad

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An analysis of a resource efficient checkpoint architecture von Akkary, Haitham, Rajwar, Ravi, Srinivasan, Srikanth T

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Continual flow pipelines von Srinivasan Srikanth, T, Rajwar, Ravi, Akkary, Haitham, Gandhi, Amit, Upton, Mike

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Transactional lock-free execution of lock-based programs von RAIWAR, Ravi, GOODMAN, James R

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Virtualizing Transactional Memory von Rajwar, Ravi, Herlihy, Maurice, Lai, Konrad

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Transactional execution: toward reliable, high-performance multithreading von Rajwar, R., Goodman, J.

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Hardware Atomicity: An Effective Abstraction for Reliable Software Speculation von Neelakantam, N., Zilles, C., Rajwar, R., Srinivas, S., Srinivasan, U.

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Continual flow pipelines von Srinivasan, Srikanth T., Rajwar, Ravi, Akkary, Haitham, Gandhi, Amit, Upton, Mike

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The Impact of Performance Asymmetry in Emerging Multicore Architectures von Balakrishnan, Saisanthosh, Rajwar, Ravi, Upton, Mike, Lai, Konrad

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DYNAMIC PHYSICAL REGISTER USE THRESHOLD ADJUSTMENT AND CROSS THREAD STALL IN MULTI-THREADED PROCESSORS von LIM, DAVID, G, RAJWAR, RAVI, RAJWAR, HADLEY, JAMES, D, SRINIVASAN, SRIKANTH, T, ILYIN, YURY, N, MERTEN, MATTHEW, C

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Scalable Load and Store Processing in Latency Tolerant Processors von Gandhi, Amit, Akkary, Haitham, Rajwar, Ravi, Srinivasan, Srikanth T., Lai, Konrad

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Checkpoint processing and recovery: an efficient, scalable alternative to reorder buffers von Akkary, H., Rajwar, R., Srinivasan, S.T.

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Continual flow pipelines: achieving resource-efficient latency tolerance von Srinivasan, S.T., Rajwar, R., Akkary, H., Gandhi, A., Upton, M.

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Scalable Load and Store Processing in Latency-Tolerant Processors von Gandhi, A., Akkary, H., Rajwar, R., Srinivasan, S.T., Lai, K.

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Inferential Queuing and Speculative Push von Rajwar, Ravi, Kagi, Alain, Goodman, James R

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Scalable Load and Store Processing in Latency Tolerant Processors von Gandhi, Amit, Akkary, Haitham, Rajwar, Ravi, Srinivasan, Srikanth T., Lai, Konrad

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