Evaluation of parts by mixed-level DC-connected components in logic simulation von Yuan, Dah-Cherng, Pillage, Lawrence T., Rahmeh, Joseph T.

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Concurrent Hierarchical and Multilevel Simulation of VLSI Circuits von Mueller-Thuns, Robert B., Rahmeh, Joseph T., Abraham, Jacob A., Wehbeh, Jalal A., Saab, Daniel G.

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Improving the accuracy of dynamic branch prediction using branch correlation von Pan, Shien-Tai, So, Kimming, Rahmeh, Joseph T

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Real-time address trace generation von GROHOSKI GREGORY F, RAHMEH JOSEPH T, JORDAN PAUL J

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Real-time address trace generation von Jordan, Paul J, Rahmeh, Joseph T, Grohoski, Gregory F

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ENHANCED ROUTING GRID SYSTEM AND METHOD von PATEL, PARSOTAM, T, MEHROTRA, SHARAD, RAHMEH, JOSEPH, T, SUTHERLAND, JEANNETTE, N

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FAUST: An MOS Fault Simulator with Timing Information von Hsi-Ching Shih, Rahmeh, J.T., Abraham, J.A.

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Correlation-based branch prediction von Pan, S.-T., So, K., Rahmeh, J.T.

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Improving the accuracy of dynamic branch prediction using branch correlation von Pan, Shien-Tai, So, Kimming, Rahmeh, Joseph T.

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ENHANCED ROUTING GRID SYSTEM AND METHOD von PATEL, PARSOTAM, T, MEHROTRA, SHARAD, RAHMEH, JOSEPH, T, SUTHERLAND, JEANNETTE, N

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Hierarchical multi-level fault simulation of large systems von Saab, Daniel G., Mueller-Thuns, Robert B., Blaauw, David, Rahmeh, Joseph T., Abraham, Jacob A.

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Automatic generation of behavioral models from switch-level descriptions von Blaauw, D. T., Saab, D. G., Mueller-Thuns, R. B., Abraham, J. A., Rahmeh, J. T.

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Interlock schemes for micropipelines: application to a self-timed rebound sorter von Karthik, S., de Souza, I., Rahmeh, J.T., Abraham, J.A.

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CHAMP: concurrent hierarchical and multilevel program for simulation of VLSI circuits von Saab, D.G., Mueller-Thuns, R.B., Blaauw, D., Abraham, J.A., Rahmeh, J.T.

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TIDBITS:speedup via time-delay bit-slicing in ALU design for VLSI technology von Hsu, Peter Y T, Rahmeh, Joseph T, Davidson, Edward S, Abraham, Jacob A

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TIDBITS: speedup via time-delay bit-slicing in ALU design for VLSI technology von Hsu, Peter Y. T., Rahmeh, Joseph T., Davidson, Edward S., Abraham, Jacob A.

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Method for design optimization using logical and physical information von MALIK SHARAD, RAJE SALIL R, YEAP GARY K, CHAKRABORTY ABHIJEET, TARAPOREVALA FEROZE PESHOTAN, TUNCER EMRE, SARRAFZADEH MAJID, PILEGGI LAWRENCE, SHIEH LILLY, KOFORD JAMES S, GAITONDE DINESH, BOYLE DOUGLAS B, LI ARCHIE, YAMAMOTO DENNIS, GLUSS DAVID, LI YAU-TSUN STEVEN, KIM SAM JUNG, SHORTT ROBERT EUGENE, RAHMEH JOSEPH T, GAO TONG, DUNN CHRISTOPHER, MCCAUGHRIN ERIC, PULLELA SATAMURTHY

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Fine needle aspiration biopsy of primary renal synovial sarcoma: A case report von VESOULIS, Zissis, RAHMEH, Tarek, NELSON, Rick, CLARKE, Raymond, YOU LU, DANKOFF, Joseph

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Fine Needle Aspiration Biopsy of Primary Renal Synovial Sarcoma von Vesoulis, Zissis, Rahmeh, Tarek, Nelson, Rick, Clarke, Raymond, Lu, You, Dankoff, Joseph

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