Using the complement of the cosine to compute trigonometric functions von Guerrero Martos, David, Millán Calderón, Alejandro, Juan Chico, Jorge, Viejo Cortés, Julian, Bellido Díaz, Manuel J., Ruiz-de-Clavijo Vazquez, Paulino, Ostúa Arangüena, Enrique

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An Integrated Digital System Design Framework With On-Chip Functional Verification and Performance Evaluation von Cano-Quiveu, German, Ruiz-De-Clavijo-Vazquez, Paulino, Bellido-Diaz, Manuel J., Guerrero-Martos, David, Viejo-Cortes, Julian, Juan-Chico, Jorge

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interview: Our proposal is a hardware‐friendly file system suitable for embedded systems von Ruiz‐de‐Clavijo, Paulino

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interview von Ruiz‐de‐Clavijo, Paulino

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NanoBoot: A Field-Programmable Gate Array/System-on-Chip Hardware Boot Loader for IoT Devices von Ruiz-de-Clavijo, Paulino, Cano-Quiveu, German, Juan, Jorge, Bellido, Manuel Jesus, Viejo-Cortes, Julian, Guerrero, David, Ostua, Enrique

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Address-encoded byte order von Guerrero, David, Cano-Quiveu, German, Juan-Chico, Jorge, Millan, Alejandro, Bellido, Manuel J., Viejo, Julian, Ruiz-de-Clavijo, Paulino, Ostua, Enrique

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High-Performance Time Server Core for FPGA System-on-Chip von Viejo, Julian, Juan-Chico, Jorge, Bellido, Manuel J., Ruiz-de-Clavijo, Paulino, Guerrero, David, Ostua, Enrique, Cano, German

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Embedded LUKS (E-LUKS): A Hardware Solution to IoT Security von Cano-Quiveu, German, Ruiz-de-clavijo-Vazquez, Paulino, Bellido, Manuel J., Juan-Chico, Jorge, Viejo-Cortes, Julian, Guerrero-Martos, David, Ostua-Aranguena, Enrique

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Power Dissipation Associated to Internal Effect Transitions in Static CMOS Gates von Millan, Alejandro, Juan, Jorge, Bellido, Manuel J., Guerrero, David, Ruiz-de-Clavijo, Paulino, Viejo, Julian

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Minimalistic SDHC-SPI hardware reader module for boot loader applications von Ruiz-de-Clavijo, Paulino, Ostúa, Enrique, Bellido, Manuel-J., Juan, Jorge, Viejo, Julián, Guerrero, David

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ELECTRONIC DEVICE CALCULATOR OF TRIGONOMETRIC FUNCTIONS (Machine-translation by Google Translate, not legally binding) von Millán Calderón, Alejandro, Bellido Díaz, Manuel Jesús, Viejo Cortés, Julián, Ostúa Arangüena, Enrique, Ruiz de Clavijo Vázquez, Paulino, Guerrero Martos, David, Juan Chico, Jorge

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ELECTRONIC DEVICE CALCULATOR OF TRIGONOMETRIC FUNCTIONS AND USES OF THE SAME (Machine-translation by Google Translate, not legally binding) von Millán Calderón, Alejandro, Bellido Díaz, Manuel Jesús, Viejo Cortés, Julián, Ostúa Arangüena, Enrique, Ruiz de Clavijo Vázquez, Paulino, Guerrero Martos, David, Juan Chico, Jorge

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Characterization of Normal Propagation Delay for Delay Degradation Model (DDM) von Millán, Alejandro, Juan, Jorge, Bellido, Manuel J., Ruiz-de-Clavijo, Paulino, Guerrero, David

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Application of internode model to global power consumption estimation in SCMOS gates von CALDERON, Alejandro Millan, BELLIDO DIAZ, Manuel Jesus, JUAN-CHICO, Jorge, RUIZ DE CLAVIJO, Paulino, GUERRERO MARTOS, David, OSTUA, E, VIEJO, J

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Signal Sampling Based Transition Modeling for Digital Gates Characterization von Millán, Alejandro, Juan, Jorge, Bellido, Manuel J., Ruiz-de-Clavijo, Paulino, Guerrero, David, Ostúa, Enrique

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Logic-Level Fast Current Simulation for Digital CMOS Circuits von Ruiz de Clavijo, Paulino, Juan-Chico, Jorge, Bellido Díaz, Manuel Jesús, Millán Calderón, Alejandro, Guerrero Martos, David, Ostúa, E., Viejo, J.

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Experiencia en la adaptación de una asignatura de máster para su impartición completa a distancia von Carrasco Muñoz, Alejandro, Cano Quiveu, Germán, Juan Chico, Jorge, Viejo Cortés, Julián, Ruíz de Clavijo Vázquez, Paulino

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Digital electronic circuit for the calculation of sinuses and cosines of multiples of an angle (Machine-translation by Google Translate, not legally binding) von JUAN CHICO, Jorge, MILLAN CALDERON, Alejandro, RUIZ DE CLAVIJO VAZQUEZ, Paulino, BELLIDO DIAZ, Manuel Jesús, VIEJO CORTES, Julián, OSTUA ARANGÜENA, Enrique, GUERRERO MARTOS, David, VILLAR DE OSSORNO, Jose Ignacio, QUIROS CARMONA, Juan, MUNOZ RIVERA, Alejandro

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Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level von Ruiz-de-Clavijo, Paulino, Juan, Jorge, Bellido, Manuel J., Millán, Alejandro, Guerrero, David

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Degradation Delay Model Extension to CMOS Gates von Juan-Chico, Jorge, Bellido, Manuel J., Ruiz-de-Clavijo, Paulino, Acosta, Antonio J., Valencia, Manuel

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