Gallium Nitride and Silicon Transistors on 300 mm Silicon Wafers Enabled by 3-D Monolithic Heterogeneous Integration von Then, Han Wui, Radosavljevic, Marko, Jun, Kimin, Koirala, Pratik, Krist, Brian, Talukdar, Tushar, Thomas, Nicole, Fischer, Paul

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Process integration and future outlook of 2D transistors von O’Brien, Kevin P., Naylor, Carl H., Dorow, Chelsey, Maxey, Kirby, Penumatcha, Ashish Verma, Vyatskikh, Andrey, Zhong, Ting, Kitamura, Ande, Lee, Sudarat, Rogan, Carly, Mortelmans, Wouter, Kavrik, Mahmut Sami, Steinhardt, Rachel, Buragohain, Pratyush, Dutta, Sourav, Tronic, Tristan, Clendenning, Scott, Fischer, Paul, Putna, Ernisse S., Radosavljevic, Marko, Metz, Matt, Avci, Uygar

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Toward attojoule switching energy in logic transistors von Datta, Suman, Chakraborty, Wriddhi, Radosavljevic, Marko

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Controlled creation of a carbon nanotube diode by a scanned gate von Freitag, Marcus, Radosavljevic, Marko, Zhou, Yangxin, Johnson, A. T., Smith, Walter F.

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Investigation of Impact Ionization in InAs-Channel HEMT for High-Speed and Low-Power Applications von Chia-Yuan Chang, Heng-Tung Hsu, Chang, E.Y., Chien-I Kuo, Datta, S., Radosavljevic, M., Miyamoto, Y., Guo-Wei Huang

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Flow characterization of various singularities in a real-scale ventilation network with rectangular ducts von Malet, J., Radosavljevic, M., Mbaye, M., Costa, D., Wiese, J., Gehin, E.

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Ultra-High- k Ferroelectric BaTiO 3 Perovskite in the Gate Stack for Two-Dimensional WSe 2 p-Type High-Performance Transistors von Debashis, Punyashloka, Ryu, Hojoon, Steinhardt, Rachel, Buragohain, Pratyush, Plombon, John J, Maxey, Kirby, O'Brien, Kevin P, Kim, Raseong, Sen Gupta, Arnab, Rogan, Carly, Lux, Jennifer, Tung, I-Cheng, Adams, Dominique, Gulseren, Melisa, Verma Penumatcha, Ashish, Shivaraman, Shriram, Li, Hai, Zhong, Ting, Harlson, Shane, Tronic, Tristan, Oni, Adedapo, Putna, Steve, Clendenning, Scott B, Metz, Matthew, Radosavljevic, Marko, Avci, Uygar, Young, Ian A

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Ultra-High‑k Ferroelectric BaTiO3 Perovskite in the Gate Stack for Two-Dimensional WSe2 p‑Type High-Performance Transistors von Debashis, Punyashloka, Ryu, Hojoon, Steinhardt, Rachel, Buragohain, Pratyush, Plombon, John J., Maxey, Kirby, O’Brien, Kevin P., Kim, Raseong, Sen Gupta, Arnab, Rogan, Carly, Lux, Jennifer, Tung, I-Cheng, Adams, Dominique, Gulseren, Melisa Ekin, Verma Penumatcha, Ashish, Shivaraman, Shriram, Li, Hai, Zhong, Ting, Harlson, Shane, Tronic, Tristan, Oni, Adedapo, Putna, Steve, Clendenning, Scott B., Metz, Matthew, Radosavljevic, Marko, Avci, Uygar, Young, Ian A.

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Benchmarking nanotechnology for high-performance and low-power logic transistor applications von Chau, R., Datta, S., Doczy, M., Doyle, B., Jin, B., Kavalieros, J., Majumdar, A., Metz, M., Radosavljevic, M.

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Carrier Transport in High-Mobility III-V Quantum-Well Transistors and Performance Impact for High-Speed Low-Power Logic Applications von Dewey, G., Hudait, M.K., Kangho Lee, Pillarisetty, R., Rachmady, W., Radosavljevic, M., Rakshit, T., Chau, R.

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Advancements in 300 mm GaN-on-Si Technology With Industry's First Circuit Demonstration of Monolithically Integrated GaN and Si Transistors von Yu, Qiang, Farid, Ali A., Momson, Ibukunoluwa, Garrett, Jeffrey, Vora, Heli, Bader, Samuel, Zubair, Ahmad, Koirala, Pratik, Beumer, Michael, Vyatskikh, Andrey, Nordeen, Paul, Hoff, Thomas, Radosavljevic, Marko, Rami, Said, O'Mahony, Frank, Then, Han Wui

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Understanding Student Preferences for Postpaid Mobile Services using Conjoint Analysis

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Application of high-κ gate dielectrics and metal gate electrodes to enable silicon and non-silicon logic nanotechnology von Chau, Robert, Brask, Justin, Datta, Suman, Dewey, Gilbert, Doczy, Mark, Doyle, Brian, Kavalieros, Jack, Jin, Ben, Metz, Matthew, Majumdar, Amlan, Radosavljevic, Marko

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Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering von Kavalieros, J., Doyle, B., Datta, S., Dewey, G., Doczy, M., Jin, B., Lionberger, D., Metz, M., Rachmady, W., Radosavljevic, M., Shah, U., Zelick, N., Chau, R.

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DEA Window Analysis Approach for Measuring the Efficiency of Serbian Banks Based on Panel Data von Savic, Gordana, Radosavljevic, Marko, Ilijevski, Danijel

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RF and Logic Performance Improvement of In0.7Ga0.3As/InAs/In0.7Ga0.3As Composite-Channel HEMT Using Gate-Sinking Technology von KUO, Chien-I, HSU, Heng-Tung, CHANG, Edward Yi, CHANG, Chia-Yuan, MIYAMOTO, Yasuyuki, DATTA, Suman, RADOSAVLJEVIC, Marko, HUANG, Guo-Wei, LEE, Ching-Ting

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GATE-TO-GATE ISOLATION FOR STACKED TRANSISTOR ARCHITECTURE VIA NON-SELECTIVE DIELECTRIC DEPOSITION STRUCTURE von RADOSAVLJEVIC, Marko, THOMAS, Nicole

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HIGH VOLTAGE METAL INSULATOR METAL (MIM) CAPACITOR von THEN, Han Wui, RADOSAVLJEVIC, Marko

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HIGH VOLTAGE METAL INSULATOR METAL (MIM) CAPACITOR von THEN, Han Wui, RADOSAVLJEVIC, Marko

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Group III-nitride (III-N) devices with reduced contact resistance and their methods of fabrication von Then, Han Wui, Radosavljevic, Marko, Dasgupta, Sansaptak

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