Treffer 1 - 20 von 205 für Suche 'QUACH, NHON', Suchdauer: 0,74s Treffer weiter einschränken
  1. 1
    High availability and reliability in the itanium processor

    High availability and reliability in the itanium processor von Quach, Nhon

    Veröffentlicht in IEEE MICRO

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  2. 2
    Systematic IEEE rounding method for high-speed floating-point multipliers

    Systematic IEEE rounding method for high-speed floating-point multipliers von Quach, N.T., Takagi, N., Flynn, M.J.


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  3. 3
    RELIABLE EXECUTION USING COMPARE AND TRANSFER INSTRUCTION ON AN SMT MACHINE

    RELIABLE EXECUTION USING COMPARE AND TRANSFER INSTRUCTION ON AN SMT MACHINE von QUACH, Nhon, T, SUDHAKAR, Ranganathan

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  4. 4
    SECURITY SUBSYSTEM FOR REMOTE ATTESTATION

    SECURITY SUBSYSTEM FOR REMOTE ATTESTATION von Gummalla, Samatha, Rahbar, Ali, Chang, Diana, Choi, Donghyun, Ananthateerta, Gururaj, Solanki, Utpal Vijaysinh, Quach, Nhon Toai

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  5. 5
    SECURITY SUBSYSTEM FOR EXECUTION VERIFICATION

    SECURITY SUBSYSTEM FOR EXECUTION VERIFICATION von Gummalla, Samatha, Kang, Jonathan, Rahbar, Ali, Ananthateerta, Gururaj, Solanki, Utpal Vijaysinh, Quach, Nhon Toai, Wright, John Charles

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  6. 6
    SYSTEMS AND METHODS FOR REDUCING MOTION-TO-PHOTON LATENCY AND MEMORY BANDWIDTH IN A VIRTUAL REALITY SYSTEM

    SYSTEMS AND METHODS FOR REDUCING MOTION-TO-PHOTON LATENCY AND MEMORY BANDWIDTH IN A VIRTUAL REALITY SYSTEM von KHAN, Moinul, LEMOINE, Todd, RIBBLE, Maurice, TAVAKOLI, Mehrad, YUEN, Ricky Wai Kit, QUACH, Nhon, RENSCHLER, Martin, KULKARNI, Rashmi

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  7. 7
    Processor including efficient signature generation for logic error protection

    Processor including efficient signature generation for logic error protection von Quach, Nhon

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  8. 8
    Processor including efficient signature generation for logic error protection

    Processor including efficient signature generation for logic error protection von QUACH NHON

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  9. 9
    SECURITY SUBSYSTEM FOR REMOTE ATTESTATION

    SECURITY SUBSYSTEM FOR REMOTE ATTESTATION von CHANG, Diana, WRIGHT, John Charles, CHOI, Donghyun, KANG, Jonathan, GUMMALLA, Samatha, ANANTHATEERTA, Gururaj, RAHBAR, Ali, QUACH, Nhon Toai, SOLANKI, Utpal Vijaysinh

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  10. 10
    SECURITY SUBSYSTEM FOR EXECUTION VERIFICATION

    SECURITY SUBSYSTEM FOR EXECUTION VERIFICATION von CHANG, Diana, WRIGHT, John Charles, CHOI, Donghyun, KANG, Jonathan, GUMMALLA, Samatha, ANANTHATEERTA, Gururaj, RAHBAR, Ali, QUACH, Nhon Toai, SOLANKI, Utpal Vijaysinh

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  11. 11
    Systems and methods for implementing error correcting code regions in a memory

    Systems and methods for implementing error correcting code regions in a memory von Li, Yanru, Quach, Nhon, Gulati, Rahul

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  12. 12
    An area model for on-chip memories and its application

    An area model for on-chip memories and its application von Mulder, J.M., Quach, N.T., Flynn, M.J.


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  13. 13
    PROCESSOR INCLUDING EFFICIENT SIGNATURE GENERATION FOR LOGIC ERROR PROTECTION

    PROCESSOR INCLUDING EFFICIENT SIGNATURE GENERATION FOR LOGIC ERROR PROTECTION von QUACH NHON

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  14. 14
    DISPLAY SYNCHRONIZED IMAGE WARPING

    DISPLAY SYNCHRONIZED IMAGE WARPING von KHAN, Moinul, MENA, Assaf, RIBBLE, Maurice, QUACH, Nhon, RENSCHLER, Martin, CHANDRASEKHAR, Ramesh, BI, Ning

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  15. 15
    Reliable execution using compare and transfer instruction on an SMT machine

    Reliable execution using compare and transfer instruction on an SMT machine von QUACH NHON T, SUDHAKAR RANGANATHAN

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  16. 16
    DISPLAY SYNCHRONIZED IMAGE WARPING

    DISPLAY SYNCHRONIZED IMAGE WARPING von KHAN, Moinul, MENA, Assaf, RIBBLE, Maurice, QUACH, Nhon, RENSCHLER, Martin, CHANDRASEKHAR, Ramesh, BI, Ning

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  17. 17
    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS IN A MEMORY

    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS IN A MEMORY von LI, Yanru, QUACH, Nhon, GULATI, Rahul

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  18. 18
    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS IN A MEMORY

    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE REGIONS IN A MEMORY von GULATI RAHUL, LI YANRU, QUACH NHON

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  19. 19
    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE IN A MEMORY

    SYSTEMS AND METHODS FOR IMPLEMENTING ERROR CORRECTING CODE IN A MEMORY von HARDACKER, Robert, BHUYAN, Pranjal, HEDDES, Mattheus, QUACH, Nhon, SHABEL, Jeffrey, GULATI, Rahul, BISWAS, Mainak

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  20. 20
    Firmwave mechanism for correcting soft errors

    Firmwave mechanism for correcting soft errors von Quach, Nhon

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