Force-directed scheduling for the behavioral synthesis of ASICs von Paulin, P.G., Knight, J.P.

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Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia von Paulin, P.G., Pilkington, C., Langevin, M., Bensoudane, E., Lyonnard, D., Benny, O., Lavigueur, B., Lo, D., Beltrame, G., Gagne, V., Nicolescu, G.

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Scheduling and binding algorithms for high-level synthesis von Paulin, P. G., Knight, J. P.

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Horizontal partitioning of PLA-based finite state machines von Paulin, P. G.

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StepNP: a system-level exploration platform for network processors von Paulin, P.G., Pilkington, C., Bensoudane, E.

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FlexWare: a retargetable, embedded-software development environment von Paulin, P.G., Santana, M.

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DATE panel chips of the future: soft, crunchy or hard? von Paulin, P.G.

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Embedded software in real-time signal processing systems: design technologies von Goossens, G., Van Praet, J., Lanneer, D., Geurts, W., Kifli, A., Liem, C., Paulin, P.G.

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Embedded software in real-time signal processing systems: application and architecture trends von Paulin, P.G., Liem, C., Cornero, M., Nacabal, F., Goossens, G.

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Algorithms for high-level synthesis von Paulin, P.G., Knight, J.P.

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Network processors: a perspective on market requirements, processor architectures and embedded S/W tools von Paulin, P.G., Karim, F., Bromley, P.

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Embedded software in real-time signal processing systems : Application and architecture trends: Hardware/software co-design von PAULIN, P. G, LIEM, C, CORNERO, M, NACABAL, F, GOOSSENS, G

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Embedded software in real-time signal processing systems : Design technologies: Hardware/software co-design von GOOSSENS, G, VAN PRAET, J, LANNEER, D, GEURTS, W, KIFLI, A, LIEM, C, PAULIN, P. G

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Application of a multi-processor SoC platform to high-speed packet forwarding von Paulin, P.G., Pilkington, C., Bensoudane, E., Langevin, M., Lyonnard, D.

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HAL: a multi-paradigm approach to automatic data path synthesis von Paulin, P. G., Knight, J. P., Girczyc, E. F.

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Network processing challenges and an experimental NPU platform [network processor unit] von Paulin, P.G., Pilkington, C., Bensoudane, E.

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Force-directed scheduling in automatic data path synthesis von Paulin, P. G., Knight, J. P.

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HAL: A Multi-Paradigm Approach to Automatic Data Path Synthesis von Paulin, P.G., Knight, J.P., Girczyc, E.F.

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Parallel programming models for a multi-processor SoC platform applied to high-speed traffic management von Paulin, Pierre G., Pilkington, Chuck, Langevin, Michel, Bensoudane, Essaid, Nicolescu, Gabriela

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Automatic mapping of parallel applications onto multi-processor platforms: a multimedia application von Paulin, P.G.

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