CMOS-based cryogenic control of silicon quantum circuits von Xue, Xiao, Patra, Bishnu, van Dijk, Jeroen P. G., Samkharadze, Nodar, Subramanian, Sushil, Corna, Andrea, Paquelet Wuetz, Brian, Jeon, Charles, Sheikh, Farhana, Juarez-Hernandez, Esdras, Esparza, Brando Perez, Rampurawala, Huzaifa, Carlton, Brent, Ravikumar, Surej, Nieva, Carlos, Kim, Sungwon, Lee, Hyung-Jin, Sammak, Amir, Scappucci, Giordano, Veldhorst, Menno, Sebastiano, Fabio, Babaie, Masoud, Pellerano, Stefano, Charbon, Edoardo, Vandersypen, Lieven M. K.

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A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons von Van Dijk, Jeroen Petrus Gerardus, Patra, Bishnu, Subramanian, Sushil, Xue, Xiao, Samkharadze, Nodar, Corna, Andrea, Jeon, Charles, Sheikh, Farhana, Juarez-Hernandez, Esdras, Esparza, Brando Perez, Rampurawala, Huzaifa, Carlton, Brent R., Ravikumar, Surej, Nieva, Carlos, Kim, Sungwon, Lee, Hyung-Jin, Sammak, Amir, Scappucci, Giordano, Veldhorst, Menno, Vandersypen, Lieven M. K., Charbon, Edoardo, Pellerano, Stefano, Babaie, Masoud, Sebastiano, Fabio

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A Self-Calibrated 2-bit Time-Period Comparator-Based Synthesized Fractional-N MDLL in 22-nm FinFET CMOS von Kundu, Somnath, Chai, Likai, Chandrashekar, Kailash, Pellerano, Stefano, Carlton, Brent R.

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A 2.4-GHz 20-40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS von Ravi, A., Madoglio, P., Hongtao Xu, Chandrashekar, K., Verhelst, M., Pellerano, S., Cuellar, L., Aguirre-Hernandez, M., Sajadieh, M., Zarate-Roldan, J. E., Bochobza-Degani, O., Lakdawala, H., Palaskas, Y.

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An E -Band Power Amplifier With 26.3% PAE and 24-GHz Bandwidth in 22-nm FinFET CMOS von Callender, Steven, Pellerano, Stefano, Hull, Christopher

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A mm-Wave Power-Harvesting RFID Tag in 90 nm CMOS von Pellerano, Stefano, Alvarado, Javier, Palaskas, Yorgos

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An [Formula Omitted]-Band Power Amplifier With 26.3% PAE and 24-GHz Bandwidth in 22-nm FinFET CMOS von Callender, Steven, Pellerano, Stefano, Hull, Christopher

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IEEE Radio Frequency Integrated Circuits Symposium

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A CMOS Wideband Current-Mode Digital Polar Power Amplifier With Built-In AM-PM Distortion Self-Compensation von Jong Seok Park, Yanjie Wang, Pellerano, Stefano, Hull, Christopher, Hua Wang

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A Reconfigurable Non-Uniform Power-Combining V-Band PA With+17.9 dBm P-sat and 26.5% PAE in 16-nm FinFET CMOS von Chu, Kun-Da, Callender, Steven, Wang, Yanjie, Rudell, Jacques Christophe, Pellerano, Stefano, Hull, Christopher

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A VTC/TDC-Assisted 4 \times Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW von Whitcombe, Amy, Lee, Chun C., Thekkumpate, Asma Beevi Kuriparambil, Kundu, Somnath, Timbadiya, Jaykant, Agrawal, Abhishek, Carlton, Brent, Sagazio, Peter, Pellerano, Stefano, Hull, Christopher

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Designing a DDS-Based SoC for High-Fidelity Multi-Qubit Control von van Dijk, Jeroen P. G., Patra, Bishnu, Pellerano, Stefano, Charbon, Edoardo, Sebastiano, Fabio, Babaie, Masoud

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A Fully Integrated 160-Gb/s D-Band Transmitter Achieving 1.1-pJ/b Efficiency in 22-nm FinFET von Callender, Steven, Agrawal, Abhishek, Whitcombe, Amy, Bhat, Ritesh, Rahman, Mustafijur, Lee, Chun C., Sagazio, Peter, Dogiamis, Georgios C., Carlton, Brent R., Hull, Christopher, Pellerano, Stefano

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802.11g/n Compliant Fully Integrated Wake-Up Receiver With −72-dBm Sensitivity in 14-nm FinFET CMOS von Alpman, Erkan, Khairi, Ahmad, Dorrance, Richard, Park, Minyoung, Somayazulu, V. Srinivasa, Foerster, Jeffrey R., Ravi, Ashoke, Paramesh, Jeyanandh, Pellerano, Stefano

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A Reconfigurable Non-Uniform Power-Combining V-Band PA With +17.9 dBm Psat and 26.5% PAE in 16-nm FinFET CMOS von Chu, Kun-Da, Callender, Steven, Wang, Yanjie, Rudell, Jacques Christophe, Pellerano, Stefano, Hull, Christopher

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A 128-Gb/s D-Band Receiver With Integrated PLL and ADC Achieving 1.95-pJ/b Efficiency in 22-nm FinFET von Agrawal, Abhishek, Whitcombe, Amy, Shin, Woorim, Bhat, Ritesh, Kundu, Somnath, Sagazio, Peter, Chandrakumar, Hariprasad, Brown, Thomas W., Carlton, Brent R., Hull, Christopher, Callender, Steven, Pellerano, Stefano

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A VTC/TDC-Assisted 4× Interleaved 3.8 GS/s 7b 6.0 mW SAR ADC With 13 GHz ERBW von Whitcombe, Amy, Lee, Chun C., Kuriparambil Thekkumpate, Asma Beevi, Kundu, Somnath, Timbadiya, Jaykant, Agrawal, Abhishek, Carlton, Brent, Sagazio, Peter, Pellerano, Stefano, Hull, Christopher

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A Fully Integrated Cryo-CMOS SoC for State Manipulation, Readout, and High-Speed Gate Pulsing of Spin Qubits von Park, Jongseok, Subramanian, Sushil, Lampert, Lester, Mladenov, Todor, Klotchkov, Ilya, Kurian, Dileep J., Juarez-Hernandez, Esdras, Esparza, Brando Perez, Kale, Sirisha Rani, K. T., Asma Beevi, Premaratne, Shavindra P., Watson, Thomas F., Suzuki, Satoshi, Rahman, Mustafijur, Timbadiya, Jaykant B., Soni, Saksham, Pellerano, Stefano

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Probing single electrons across 300-mm spin qubit wafers von Neyens, Samuel, Zietz, Otto K., Watson, Thomas F., Luthi, Florian, Nethwewala, Aditi, George, Hubert C., Henry, Eric, Islam, Mohammad, Wagner, Andrew J., Borjans, Felix, Connors, Elliot J., Corrigan, J., Curry, Matthew J., Keith, Daniel, Kotlyar, Roza, Lampert, Lester F., Mądzik, Mateusz T., Millard, Kent, Mohiyaddin, Fahd A., Pellerano, Stefano, Pillarisetty, Ravi, Ramsey, Mick, Savytskyy, Rostyslav, Schaal, Simon, Zheng, Guoji, Ziegler, Joshua, Bishop, Nathaniel C., Bojarski, Stephanie, Roberts, Jeanette, Clarke, James S.

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A 64 GHz LNA With 15.5 dB Gain and 6.5 dB NF in 90 nm CMOS von Pellerano, S., Palaskas, Y., Soumyanath, K.

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