VO2 Switch for Electrostatic Discharge Protection von Bohaichuk, Stephanie M., Pelella, Mario M., Sun, Yifei, Zhang, Zhen, Ramanathan, Shriram, Pop, Eric

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Design and Characterization of ESD Protection Devices for High-Speed I/O in Advanced SOI Technology von Shuqing Cao, Salman, A.A., Jung-Hoon Chun, Beebe, S.G., Pelella, M.M., Dutton, R.W.

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On the performance advantage of PD/SOI CMOS with floating bodies von Pelella, M.M., Fossum, J.G.

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VO 2 Switch for Electrostatic Discharge Protection von Bohaichuk, Stephanie M., Pelella, Mario M., Sun, Yifei, Zhang, Zhen, Ramanathan, Shriram, Pop, Eric

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Field Effect Resistor, a single-device-at-pad solution for ESD protection in deeply scaled SOI technology von Shuqing Cao, Salman, Akram A, Jung-Hoon Chun, Beebe, Stephen G, Pelella, Mario M, Dutton, Robert W

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Physical modeling of temperature dependences of SOI CMOS devices and circuits including self-heating von Workman, G.O., Fossum, J.G., Krishnan, S., Pelella, M.M.

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GC's Welcome von Pelella, Mario M.

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Dynamic data retention and implied design criteria for floating-body SOI DRAM von Dongwook Suh, Fossum, J.G., Pelella, M.M.

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SOI antennas and wafer bulk connection von Hook, T.B., Pelella, M.M.

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Device Physics and Modeling von Pelella, Mario M., Poiroux, Thierry

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Field effect diode for effective CDM ESD protection in 45 nm SOI technology von Shuqing Cao, Beebe, S.G., Salman, A.A., Pelella, M.M., Jung-Hoon Chun, Dutton, R.W.

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Electro-static discharge (ESD) protection clamp technology von Pelella, Mario M, Bohaichuk, Stephanie Marie

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Floating-body effects in partially depleted SOI CMOS circuits von Pong-Fei Lu, Ching-Te Chuang, Jin Ji, Wagner, L.F., Chang-Ming Hsieh, Kuang, J.B., Hsu, L.L.-C., Pelella, M.M., Chu, S.-F.S., Anderson, C.J.

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STACKED INTEGRATED CIRCUIT DIES AND INTERCONNECT STRUCTURES von KINSMAN, Larry Duane, PELELLA, Mario M, SULFRIDGE, Marc Allen, LIN, Yusheng, KOTHANDARAMAN, Chandrasekharan, BORTHAKUR, Swarnal

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Double-well field effect diode vs. SCR behavior under CDM stress in 45nm SOI technology von Salman, Akram A., Cao, Shuqing, Beebe, Stephen G., Pelella, Mario M., Dutton, Robert W.

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Scalable PD/SOI CMOS with floating bodies von Fossum, J.G., Pelella, M.M., Krishnan, S.

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Switching-mode dependence of inductive noise in VLSI power bus lines von Jung-Suk Goo, Hale, S., Zamudio, L., Pelella, M.M., Klein, R., Butler, S., Judy Xilin An, Lee, M., Icel, A.B.

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Non-Contact, Pad-less Measurement Technology and Test Structures for Characterization of Cross-Wafer and In-Die Product Variability von Steinbrueck, G., Vickers, J.S., Babazadeh, M., Pelella, M.M., Pakdaman, N.

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STACKED INTEGRATED CIRCUIT DIES AND INTERCONNECT STRUCTURES von KINSMAN, Larry Duane, PELELLA, Mario M, SULFRIDGE, Marc Allen, LIN, Yusheng, KOTHANDARAMAN, Chandrasekharan, BORTHAKUR, Swarnal

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ELECTRO-STATIC DISCHARGE (ESD) PROTECTION CLAMP TECHNOLOGY von PELELLA, Mario M, BOHAICHUK, Stephanie Marie

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