Design and Implementation of Asynchronous Processor on FPGA von Shin, Ziho, Oh, Myeong-Hoon

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Gen‐Z memory pool system implementation and performance measurement von Kwon, Won‐ok, Sok, Song‐Woo, Park, Chan‐ho, Oh, Myeong‐Hoon, Hong, Seokbin

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Hardware Implementation and Analysis of Gen-Z Protocol for Memory-Centric Architecture von Hong, Seokbin, Kwon, Won-Ok, Oh, Myeong-Hoon

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Wire Optimization and Delay Reduction for High‐Performance on‐Chip Interconnection in GALS Systems von Oh, Myeong‐Hoon, Kim, Young Woo, Kim, Hag Young, Kim, Young‐Kyun, Kim, Jin‐Sung

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Asynchronous 2‐Phase Protocol Based on Ternary Encoding for On‐Chip Interconnect von Oh, Myeong‐Hoon, Kim, Seongwoon

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Architectural Design Issues in a Clockless 32‐Bit Processor Using an Asynchronous HDL von Oh, Myeong‐Hoon, Kim, Young Woo, Kwak, Sanghoon, Shin, Chi‐Hoon, Kim, Sung‐Nam

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Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains von Song, Sung-Gun, Park, Seong-Mo, Lee, Jeong-Gun, Oh, Myeong-Hoon

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Appropriate Synchronization Time Allocation for Distributed Heterogeneous Parallel Computing Systems von Nidaw, Biruk Yirga, Oh, Myeong-Hoon, Kim, Young Woo

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Multi-communication layered HPL model and its application to GPU clusters von Kim, Young Woo, Oh, Myeong-Hoon, Park, Chan Yeol

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A new data encoding scheme using multi-valued logic for an asynchronous handshake protocol von Sung-Gun Song, Seong-Mo Park, Myeong-Hoon Oh

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Wire Optimization and Delay Reduction for High-Performance on-Chip Interconnection in GALS Systems von Oh, Myeong-Hoon, Kim, Young Woo, Kim, Hag Young, Kim, Young-Kyun, Kim, Jin-Sung

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Low Static Powered Asynchronous Data Transfer for GALS System von OH, Myeong-Hoon, KIM, Seongwoon

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Architectural Design Issues in a Clockless 32 Bit Processor Using an Asynchronous HDL von Oh, Myeong-Hoon, Kim, Young Woo, Kwak, Sanghoon, Shin, Chi-Hoon, Kim, Sung-Nam

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Fine-Grained FSMD Power Gating Considering Power Overhead von Shin, Chi-Hoon, Oh, Myeong-Hoon, Sim, Jae-Woo, Jeong, Jae-Chan, Kim, Seong-Woon

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Signal integrity analysis of system interconnection module of high-density server supporting serial RapidIO von Kwon, Hyukje, Kwon, Wonok, Oh, Myeong-Hoon, Kim, Hagyoung

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Implementation of an Asynchronous Micro-controlleron the Commercial FPGA von Shin, Ziho, Oh, Myeong-Hoon, Kwon, Hyukje, Kim, Hagyoung, Kang, Dongjae

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Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains von Song, Sung-Gun, Park, Seong-Mo, Lee, Jeong-Gun, Oh, Myeong-Hoon

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Method and apparatus for controlling congestion based on Gen-Z interface von Ma, Jin-Suk, Sok, Song-Woo, Kim, Hag Young, Oh, Myeong-Hoon

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Method for generating and processing extended instruction and apparatus using the method von Ma, Jin-Suk, Kim, Hag Young, Park, Chanho, Sok, Song-woo, Kwon, Won-Ok, Kwon, Hyuk Je, Oh, Myeong-Hoon, Jung, Byung Kwon, Kim, Young Woo

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Cost-effective delay-insensitive data transfer mechanism using current-mode multiple valued logic von Myeong-Hoon Oh, Dong-Geun Paek, Eun-Gu Jung, Dong-Ik Lee

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