Development of Materials Informatics Platform von Orii, Yasumitsu, Hirose, Shuichi, Fujita, Akihiro, Kobayashi, Masakazu

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Temperature Driven Current-Voltage Characteristics of Ionic Liquid Type Intelligent Connection Device von Kobayashi, Masakazu, Orii, Yasumitsu, Shima, Hisashi, Naitoh, Yasuhisa, Akinaga, Hiroyuki, Sato, Dan, Matsuo, Takuma, Kinoshita, Kentaro, Nokami, Toshiki, Itoh, Toshiyuki

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Thermal Stresses of Through Silicon Vias and Si Chips in Three Dimensional System in Package von Kinoshita, Takahiro, Kawakami, Takashi, Hori, Tatsuhiro, Matsumoto, Keiji, Kohara, Sayuri, Orii, Yasumitsu, Yamada, Fumiaki, Kada, Morihiro

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Development of Liquid Photoresist for IMS (Injection Molded Solder) with High Thermal Stability von Mukawa, Jun, Takahashi, Seiichirou, Kobata, Chihiro, Ohkita, Kenzo, Kusumoto, Shiro, Hasegawa, Koichi, Aoki, Toyohiro, Nakamura, Eiji, Hisada, Takashi, Mori, Hiroyuki, Orii, Yasumitsu

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Solder joint reliability evaluation of chip scale package using a modified Coffin–Manson equation von Shohji, Ikuo, Mori, Hideo, Orii, Yasumitsu

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Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack von Matsumoto, Keiji, Ibaraki, Soichiro, Sueoka, Kuniaki, Sakuma, Katsuyuki, Kikuchi, Hidekazu, Orii, Yasumitsu, Yamada, Fumiaki

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Combining an Integrated Sensor Array with Machine Learning for the Simultaneous Quantification of Multiple Cations in Aqueous Mixtures von Gabrieli, Gianmarco, Hu, Rui, Matsumoto, Keiji, Temiz, Yuksel, Bissig, Sacha, Cox, Aaron, Heller, Ralph, López, Antonio, Barroso, Jorge, Kaneda, Kitahiro, Orii, Yasumitsu, Ruch, Patrick W

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Experimental thermal resistance evaluation of a three-dimensional (3D) chip stack, including the transient measurements von Matsumoto, K., Ibaraki, S., Sueoka, K., Sakuma, K., Kikuchi, H., Orii, Y., Yamada, F.

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Investigations of cooling solutions for three-dimensional (3D) chip stacks von Matsumoto, Keiji, Ibaraki, Soichiro, Sato, Masaaki, Sakuma, Katsuyuki, Orii, Yasumitsu, Yamada, Fumiaki

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Development of Liquid Photoresist for IMS (Injection Molded Solder) with High Thermal Stability von Mukawa, Jun, Takahashi, Seiichirou, Kobata, Chihiro, Ohkita, Kenzo, Kusumoto, Shiro, Hasegawa, Koichi, Aoki, Toyohiro, Nakamura, Eiji, Hisada, Takashi, Mori, Hiroyuki, Orii, Yasumitsu

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Next Generation Packaging Technologies for Brain-inspired Devices von Orii, Yasumitsu

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Micro Structure Observation and Reliability Behavior of Peripheral Flip Chip Interconnections with Solder-Capped Cu Pillar Bumps von Orii, Yasumitsu, Toriyama, Kazushige, Kohara, Sayuri, Noma, Hirokazu, Okamoto, Keishi, Toyoshima, Daisuke, Uenishi, Keisuke

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Peripheral Flip Chip Interconnection on Au Plated Pads using Solder-Capped Cu Pillar Bumps von Noma, Hirokazu, Toriyama, Kazushige, Okamoto, Keishi, Matsumoto, Keiji, Ohno, Eiji, Mori, Hiroyuki, Orii, Yasumitsu

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IoT and Electronics Packaging von Orii, Yasumitsu

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The new challenge of a trading company turning the bigdata into a value von Orii, Yasumitsu, Nagao, Makiko

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Wettability and Reliability for Double-Sided Assembly with Chip Connection (C2) Flip-Chip Technology von Noma, Hirokazu, Oyama, Yukifumi, Nishiwaki, Hidetoshi, Takami, Masahide, Takatani, Toshiyuki, Toriyama, Kazushige, Orii, Yasumitsu

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Development of vacuum underfill technology for a 3D chip stack von Sakuma, Katsuyuki, Kohara, Sayuri, Sueoka, Kuniaki, Orii, Yasumitsu, Kawakami, Mikio, Asai, Kazuo, Hirayama, Yoshikazu, Knickerbocker, John U

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View of the trading company to make the social value with the technology von Orii, Yasumitsu, Kato, Yasuo, Kaneda, Kitahiro, Kobayashi, Masakazu, Nagao, Makiko

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Thermal design guidelines for a three-dimensional (3D) chip stack, including cooling solutions von Matsumoto, Keiji, Ibaraki, Soichiro, Sueoka, Kuniaki, Sakuma, Katsuyuki, Kikuchi, Hidekazu, Orii, Yasumitsu, Yamada, Fumiaki, Fujihara, Kohei, Takamatsu, Junichi, Kondo, Koji

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Panel discussion von Wakabayashi, Hitoshi, Yamaguchi, Eiichi, Hirayama, Teruo, Shimizu, Ken, Oshima, Yoichi, Shibata, Satoshi, Orii, Yasumitsu, Ishimaru, Kazunari, Nagao, Makiko

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