Energy-Efficient Design Methodologies: High-Performance VLSI Adders von Zeydel, Bart R, Baran, Dursun, Oklobdzija, Vojin G

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Comparative analysis of master-slave latches and flip-flops for high-performance and low-power systems von Stojanovic, V., Oklobdzija, V.G.

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Digital System Clocking: High-Performance and Low-Power Aspects von Oklobdzija, Vojin G, Stojanovic, Vladimir M, Markovic, Dejan M, Nedovic, Nikola M

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Improved sense-amplifier-based flip-flop: design and measurements von Nikolic, B., Oklobdzija, V.G., Stojanovic, V., Wenyan Jia, James Kar-Shing Chiu, Ming-Tak Leung, M.

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The Effect of the System Specification on the Optimal Selection of Clocked Storage Elements von Giacomotto, C., Nedovic, N., Oklobdzija, V.G.

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Dual-edge triggered storage elements and clocking strategy for low-power systems von Nedovic, N., Oklobdzija, V.G.

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Comparison of high-performance VLSI adders in the energy-delay space von Oklobdzija, V.G., Zeydel, B.R., Dao, H.Q., Mathew, S., Krishnamurthy, R.

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Energy optimization of pipelined digital systems using circuit sizing and supply scaling von Dao, H.Q., Zeydel, B.R., Oklobdzija, V.G.

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Optimal circuits for parallel multipliers von Stelling, P.F., Martel, C.U., Oklobdzija, V.G., Ravi, R.

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Improving multiplier design by using improved column compression tree and optimized final adder in CMOS technology von Oklobdzija, V.G., Villeger, D.

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Clocked CMOS adiabatic logic with integrated single-phase power-clock supply von Maksimovic, D., Oklobdzija, V.G., Nikolic, B., Current, K.W.

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Clocking and Clocked Storage Elements in Multi-GHz Environment von Oklobdzija, Vojin G.

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Energy efficient implementation of parallel CMOS multipliers with improved compressors von Baran, Dursun, Aktan, Mustafa, Oklobdzija, Vojin G.

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Multiplier structures for low power applications in deep-CMOS von Baran, Dursun, Aktan, Mustafa, Oklobdzija, Vojin G.

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Flip-Flop With Trigger Edge Determined By Latch Order von OKLOBDZIJA, Vojin G

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System of Free Running Oscillators for Digital System Clocking Immune to Process, Voltage and Temperature (PVT) Variations von Oklobdzija, Vojin G

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A 110 GOPS/W 16-bit multiplier and reconfigurable PLA loop in 90-nm CMOS von Hsu, S.K., Mathew, S.K., Anders, M.A., Zeydel, B.R., Oklobdzija, V.G., Krishnamurthy, R.K., Borkar, S.Y.

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FAST CLOCKED STORAGE ELEMENT von Oklobdzija, Vojin G

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Fast clocked storage element von Oklobdzija, Vojin G

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System of free running oscillators for digital system clocking immune to process, voltage and temperature (PVT) variations von Oklobdzija, Vojin G

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