High-Level Synthesis of Approximate Designs under Real-Time Constraints von Leipnitz, Marcos T., Nazar, Gabriel L.

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Fault Tolerance Mechanisms for FPGA-Based Regular Expression Matching von Leipnitz, Marcos T., Nazar, Gabriel L.

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Exploring redundancy granularities to repair real-time FPGA-based systems von Pereira-Santos, Leonardo, Nazar, Gabriel L., Carro, Luigi

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Live-Out Register Fencing: Interrupt-Triggered Soft Error Correction Based on the Elimination of Register-to-Register Communication von Ferreira, Ronaldo R., Nazar, Gabriel L., Rolt, Jean Da, Moreira, Álvaro F., Carro, Luigi

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Improving FPGA repair under real-time constraints von Nazar, Gabriel L.

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Constraint-Aware Multi-Technique Approximate High-Level Synthesis for FPGAs von Leipnitz, Marcos T., Nazar, Gabriel L.

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A variation-aware methodology for improved processor designs for the edge computing domain von Tonetto, Rafael B., Nazar, Gabriel L., Beck, Antonio Carlos S.

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PReCEP: Automatic insertion of Partial Redundancy based on Critical Error Probability von Nazar, Gabriel L., Kopper, Pedro H.C., Leipnitz, Marcos T., Juurlink, Ben

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Fast single-FPGA fault injection platform von Nazar, G. L., Carro, L.

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Radiation and Fault Injection Testing of a Fine-Grained Error Detection Technique for FPGAs von Nazar, Gabriel L., Rech, Paolo, Frost, Christopher, Carro, Luigi

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Low Cost Dynamic Scrubbing for Real-Time Systems von Santos, Leonardo P., Nazar, Gabriel L., Carro, Luigi

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Energy efficient pseudo-cache architecture through fine-grained reconfigurability von Nazar, Gabriel L., Carro, Luigi

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An Area Effective Parity-Based Fault Detection Technique for FPGAs von Nazar, G. L., Carro, L.

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Fast error detection through efficient use of hardwired resources in FPGAs von Nazar, G. L., Carro, L.

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Exploiting Modified Placement and Hardwired Resources to Provide High Reliability in FPGAs von Nazar, G. L., Carro, L.

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Reliable execution of statechart-generated correct embedded software under soft errors von Ferreira, Ronaldo R, Klotz, Thomas, Vörtler, Thilo, Rolt, Jean da, Nazar, Gabriel L, Moreira, Àlvaro F, Carro, Luigi, Einwich, Karsten

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Simultaneous reconfiguration of issue-width and instruction cache for a VLIW processor von Anjam, F., Wong, S., Carro, L., Nazar, G. L., Rutzig, M. B.

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Adapting communication for adaptable processors: A multi-axis reconfiguration approach von Santos, P. C., Nazar, G. L., Carro, L., Anjam, F., Wong, S.

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Adaptive parallelism exploitation under physical and real-time constraints for resilient systems von Itturriet, F. P., Nazar, G. L., Ferreira, R. R., Moreira, A. F., Carro, L.

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Heart rate and use of beta-blockers in stable outpatients with coronary artery disease von Steg, Ph Gabriel, Ferrari, Roberto, Ford, Ian, Greenlaw, Nicola, Tardif, Jean-Claude, Tendera, Michal, Abergel, Hélène, Fox, Kim M

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