A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm von Hart, Jason M., Hoyeol Cho, Yuefei Ge, Gruber, Gregory, Dawei Huang, Changku Hwang, Jian, Daisy, Johnson, Tim, Konstadinidis, Georgios K., Krishnaswamy, Venkat, Kwong, Lance, Masleid, Robert P., Mehta, Rakesh, Nawathe, Umesh, Ramachandran, Aparna, Sathianathan, Hari, Yongning Sheng, Shin, Jinuk Luke, Turullols, Sebastian, Zuxu Qin, Yen, King C.

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Implementation of an 8-Core, 64-Thread, Power-Efficient SPARC Server on a Chip von Nawathe, U.G., Hassan, M., Yen, K.C., Kumar, A., Ramachandran, A., Greenhill, D.

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An 8-Core 64-Thread 64b Power-Efficient SPARC SoC von Nawathe, Umesh Gajanan, Hassan, Mahmudul, Warriner, Lynn, Yen, King, Upputuri, Bharat, Greenhill, David, Kumar, Ashok, Park, Heechoul

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3.6GHz 16-core SPARC SoC processor in 28nm von Hart, J., Butler, S., Hoyeol Cho, Yuefei Ge, Gruber, G., Dawei Huang, Changku Hwang, Jian, D., Johnson, T., Konstadinidis, G., Kwong, L., Masleid, R., Nawathe, U., Ramachandran, A., Yongning Sheng, Shin, J. L., Turullois, S., Zuxu Qin, King Yen

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INTEGRATED CLOCK AND POWER DISTRIBUTION von NAWATHE UMESH GAJANAN, MASLEID ROBERT P, COLLIER DUNCAN, BALLARD JAMES

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INTEGRATED CLOCK AND POWER DISTRIBUTION von MASLEID, ROBERT, P, COLLIER, DUNCAN, NAWATHE, UMESH, GAJANAN, BALLARD, JAMES

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