A Method for Improving Power Grid Resilience to Electromigration-Caused via Failures von Di-An Li, Marek-Sadowska, Malgorzata, Nassif, Sani R.

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T-VEMA: A Temperature- and Variation-Aware Electromigration Power Grid Analysis Tool von Di-An Li, Marek-Sadowska, Malgorzata, Nassif, Sani R.

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Impact of interconnect variations on the clock skew of a gigahertz microprocessor von Liu, Ying, Nassif, Sani R, Pileggi, Lawrence T, Strojwas, Andrzej J

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A resilience roadmap von Nassif, Sani R, Mehta, Nikil, Yu Cao

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Layout Decomposition and Legalization for Double-Patterning Technology von Ghaida, R. S., Agarwal, K. B., Nassif, S. R., Xin Yuan, Liebmann, L. W., Gupta, P.

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Resilience Articulation Point (RAP): Cross-layer dependability modeling for nanometer system-on-chip resilience von Herkersdorf, Andreas, Aliee, Hananeh, Engel, Michael, Glaß, Michael, Gimmler-Dumont, Christina, Henkel, Jörg, Kleeberger, Veit B., Kochte, Michael A., Kühn, Johannes M., Mueller-Gritschneder, Daniel, Nassif, Sani R., Rauchfuss, Holm, Rosenstiel, Wolfgang, Schlichtmann, Ulf, Shafique, Muhammad, Tahoori, Mehdi B., Teich, Jürgen, Wehn, Norbert, Weis, Christian, Wunderlich, Hans-Joachim

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A Cross-Layer Technology-Based Study of How Memory Errors Impact System Resilience von Kleeberger, V. B., Gimmler-Dumont, C., Weis, C., Herkersdorf, A., Mueller-Gritschneder, D., Nassif, S. R., Schlichtmann, U., Wehn, N.

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Accurate Spatial Estimation and Decomposition Techniques for Variability Characterization von Reda, S, Nassif, S R

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Fast power grid simulation von Nassif, Sani R, Kozhaya, Joseph N

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Rigorous Extraction of Process Variations for 65-nm CMOS Design von Wei Zhao, Liu, F., Agarwal, K., Acharyya, D., Nassif, S.R., Nowka, K.J., Yu Cao

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A Simplified Design Model for Random Process Variability von Wang, V., Agarwal, K., Nassif, S.R., Nowka, K.J., Markovic, D.

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An accurate sparse-matrix based framework for statistical static timing analysis von Ramalingam, Anand, Singh, Ashish Kumar, Nassif, Sani R., Nam, Gi-Joon, Orshansky, Michael, Pan, David Z.

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Modeling and Analysis of the Nonrectangular Gate Effect for Postlithography Circuit Simulation von Singal, R., Balijepalli, A., Subramaniam, A., Chi-Chao Wang, Liu, F., Nassif, S.R., Yu Cao

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Variability Aware Simulation Based Design- Technology Cooptimization (DTCO) Flow in 14 nm FinFET/SRAM Cooptimization von Asenov, Asen, Cheng, Binjie, Xingsheng Wang, Brown, Andrew Robert, Millar, Campbell, Alexander, Craig, Amoroso, Salvatore Maria, Kuang, Jente B., Nassif, Sani R.

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Technique for the Rapid Characterization of Parametric Distributions von Hayes, J.D., Agarwal, K., Nassif, S.R.

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Modeling Interconnect Variability Using Efficient Parametric Model Order Reduction von Li, Peng, Liu, Frank, Li, Xin, Pileggi, Lawrence T., Nassif, Sani R.

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Root-Finding Methods for Assessing SRAM Stability in the Presence of Random Dopant Fluctuations von Kanj, R., Zhuo Li, Joshi, R.V., Liu, F., Nassif, S.R.

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Congestion-driven codesign of power and signal networks von Haihua Su, Jiang Hu, Sapatnekar, S.S., Nassif, S.R.

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Model to hardware matching: for nano-meter scale technologies von Nassif, Sani R.

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Power grid analysis using random walks von Haifeng Qian, Nassif, S.R., Sapatnekar, S.S.

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