A 12-ns 8-Mbyte DRAM secondary cache for a 64-bit microprocessor von Okuda, T., Naritake, I., Sugibayashi, T., Nakajima, Y., Murotani, T.

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A 30-ns 256-Mb DRAM with a multidivided array structure von Sugibayashi, T., Takeshima, T., Naritake, I., Matano, T., Takada, H., Aimoto, Y., Furuta, K., Fujita, M., Saeki, T., Sugawara, H., Murotani, T., Kasai, N., Shibahara, K., Nakajima, K., Hada, H., Hamada, T., Aizaki, N., Kunio, T., Kakehashi, E., Masumori, K., Tanigawa, T.

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A 1-Gb DRAM for file applications von Sugibayashi, T., Naritake, I., Utsugi, S., Shibahara, K., Oikawa, R., Mori, H., Iwao, S., Murotani, T., Koyama, K., Fukuzawa, S., Itani, T., Kasama, K., Okuda, T., Ohya, S., Ogawa, M.

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A 4-level storage 4 Gb DRAM von Murotani, T., Naritake, I., Matano, T., Ohtsuki, T., Kasai, N., Koga, H., Koyama, K., Nakajima, K., Yamaguchi, H., Watanabe, H., Okuda, T.

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A 1 Gb DRAM for file applications von Sugibayashi, T., Naritake, I., Utsugi, S., Shibahara, K., Oikawa, R., Mori, H., Iwao, S., Murotani, T., Koyama, K., Fukuzawa, S., Itani, T., Kasama, K., Okuda, T., Ohya, S., Ogawa, M.

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A 12 ns 8 MB DRAM secondary cache for a 64 b microprocessor von Naritake, I., Sugibayashi, T., Nakajima, Y., Utsugi, S., Hamada, M., Togo, M., Kubota, R., Fujii, T., Yoshimatsu, N., Hatayama, H., Murotami, T., Okuda, T.

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Ultra-high-performance 0.13-μm embedded DRAM technology using TiN/HfO2/TiN/W capacitor and body-slightly-tied SOI von AOKI, Y, UEDA, T, HAMADA, M, WAKE, T, NARITAKE, I, IIZUKA, T, YAMAMOTO, T, ANDO, K, NODA, K, SHIRAI, H, SAKOH, T, KITAMURA, T, ARAI, S, SAKAO, M, INOUE, K, TAKEUCHI, M, SUGIMURA, H

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A 30 ns 256 Mb DRAM with multi-divided array structure von Sugibayashi, T., Takeshima, T., Naritake, I., Matano, T., Takada, H., Aimoto, Y., Furuta, K., Fujita, M., Saeki, T., Sugawara, H., Murotani, T., Kasai, N., Shibahara, K., Nakajima, K., Hada, H., Hamada, T., Aizaki, N., Kunio, T., Kakehashi, E., Masumori, K., Tanigawa, T.

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A 0.13 /spl mu/m full metal embedded DRAM technology targeting on 1.2 V, 450 MHz operation von Arai, S., Sakoh, T., Kitamura, T., Shirai, H., Aoki, Y., Sakao, M., Inoue, K., Takeuchi, M., Naritake, I., Kawamoto, H., Iizuka, T., Yamamoto, T., Kishi, S.

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JP2930565B von BOKU EIKI, RI NARITAKE, KYO SHUICHI, KIN HEIRO, KIN KENKO

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Ultra-high-performance 0.13-/spl mu/m embedded DRAM technology using TiN/HfO2/TiN/W capacitor and body-slightly-tied SOI von Aoki, Y., Ueda, T., Shirai, H., Sakoh, T., Kitamura, T., Arai, S., Sakao, M., Inoue, K., Takeuchi, M., Sugimura, H., Hamada, M., Wake, T., Naritake, I., Iizuka, T., Yamamoto, T., Ando, K., Noda, K.

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Suppression of cellular immunity by surgical stress von Ogawa, Kenji, Hirai, Masanori, Katsube, Takao, Murayama, Minoru, Hamaguchi, Kanako, Shimakawa, Takeshi, Naritake, Yoshihiko, Hosokawa, Toshihiko, Kajiwara, Tetsuro

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System and method for determining client program based on login method von Kondoh, Naritake

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INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND CARRIER MEANS von KONDOH, Naritake

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Information processing system, information processing method, and recording medium von Kondoh, Naritake

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INFORMATION PROCESSING SYSTEM, SERVICE PROVIDING DEVICE, AND INFORMATION PROCESSING METHOD von KONDOH, Naritake

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INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND RECORDING MEDIUM von KONDOH, Naritake

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INFORMATION PROCESSING SYSTEM, INFORMATION PROCESSING METHOD, AND CARRIER MEANS von KONDOH, Naritake

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Output system, information processing system, including circuitry to generate a character string to perform authentication for a user, and authentication method von Kondoh, Naritake, Kubo, Naohiko

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Information processing system and method for processing data output requests and identification information von Kondoh, Naritake, Kubo, Naohiko

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