High-level language abstraction for reconfigurable computing von Najjar, W.A., Bohm, W., Draper, B.A., Hammes, J., Rinker, R., Beveridge, J.R., Chawathe, M., Ross, C.

Volltext

A new adaptive hardware tree-based multicast routing in k-ary n-cubes von Kumar, D.R., Najjar, W.A., Srimani, P.K.

Volltext

An automated process for compiling dataflow graphs into reconfigurable hardware von Rinker, R., Carter, M., Patel, A., Chawathe, M., Ross, C., Hammes, J., Najjar, W.A., Bohm, W.

Volltext

An analysis of edge fault tolerance in recursively decomposable regular networks von Lagman, A., Najjar, W.A., Srimani, P.K.

Volltext

Physical Unclonable Functions and Public-Key Crypto for FPGA IP Protection von Guajardo, Jorge, Kumar, Sandeep S., Schrijen, Geert-Jan, Tuyls, Pim

Volltext

Scalability analysis in gracefully-degradable large systems von Najjar, W.A., Gaudiot, J.-L.

Volltext

High-speed FPGA-based implementations of a Genetic Algorithm von Vavouras, M., Papadimitriou, K., Papaefstathiou, I.

Volltext bestellen

OpenMP extensions for FPGA accelerators von Cabrera, D., Martorell, X., Gaydadjiev, G., Ayguade, E., Jimenez-Gonzalez, D.

Volltext bestellen

An emulation-based real-time power profiling unit for embedded software von Genser, A., Bachmann, C., Haid, J., Steger, C., Weiss, R.

Volltext bestellen

FPGA implementation of a configurable cache/scratchpad memory with virtualized user-level RDMA capability von Kalokerinos, G., Papaefstathiou, V., Nikiforos, G., Kavadias, S., Katevenis, M., Pnevmatikatos, D., Xiaojun Yang

Volltext bestellen

Instruction-based reuse-distance prediction for effective cache management von Petoumenos, P., Keramidas, G., Kaxiras, S.

Volltext bestellen

ReconOS: An RTOS Supporting Hard-and Software Threads von Lubbers, Enno, Platzner, Marco

Volltext

High-level synthesis for the design of FPGA-based signal processing systems von Casseau, E., Le Gal, B.

Volltext bestellen

DWARV: Delftworkbench Automated Reconfigurable VHDL Generator von Yankova, Yana, Kuzmanov, Georgi, Bertels, Koen, Gaydadjiev, Georgi, Lu, Yi, Vassiliadis, Stamatis

Volltext

Generation and calibration of compositional performance analysis models for multi-processor systems von Haid, W., Keller, M., Kai Huang, Bacivarov, I., Thiele, L.

Volltext bestellen

Ant colony optimization for mapping and scheduling in heterogeneous multiprocessor systems von Tumeo, A., Pilato, C., Ferrandi, F., Sciuto, D., Lanzi, P.L.

Volltext bestellen

Novel energy-efficient scalable soft-output SSFE MIMO detector architectures von Fasthuber, R., Min Li, Novo, D., Raghavan, P., Van Der Perre, L., Catthoor, F.

Volltext bestellen

Tunable and Energy Efficient Bus Encoding Techniques von Suresh, D.C., Agrawal, B., Jun Yang, Najjar, W.A.

Volltext

Comparative architectural characterization of SPEC CPU2000 and CPU2006 benchmarks on the intel® Core™ 2 Duo processor von Kejariwal, A., Veidenbaum, A.V., Nicolau, A., Tian, X., Girkar, M., Saito, H., Banerjee, U.

Volltext bestellen

Preliminary Evaluation of a Hybrid Deterministic/Adaptive Router von Miller, Dianne, Najjar, Walid A.

Volltext