Practical Near-Data-Processing Architecture for Large-Scale Distributed Graph Neural Network von Huang, Linyong, Zhang, Zhe, Li, Shuangchen, Niu, Dimin, Guan, Yijin, Zheng, Hongzhong, Xie, Yuan

Volltext

OpSparse: A Highly Optimized Framework for Sparse General Matrix Multiplication on GPUs von Du, Zhaoyang, Guan, Yijin, Guan, Tianchan, Niu, Dimin, Huang, Linyong, Zheng, Hongzhong, Xie, Yuan

Volltext

Accelerating CPU-Based Sparse General Matrix Multiplication With Binary Row Merging von Du, Zhaoyang, Guan, Yijin, Guan, Tianchan, Niu, Dimin, Zheng, Hongzhong, Xie, Yuan

Volltext

Impact of process variations on emerging memristor von Dimin Niu, Yiran Chen, Cong Xu, Yuan Xie

Volltext

DRAF: A Low-Power DRAM-Based Reconfigurable Acceleration Fabric von Mingyu Gao, Delimitrou, Christina, Dimin Niu, Malladi, Krishna T., Hongzhong Zheng, Brennan, Bob, Kozyrakis, Christos

Volltext

Understanding the trade-offs in multi-level cell ReRAM memory design von Xu, Cong, Niu, Dimin, Muralimanohar, Naveen, Jouppi, Norman P., Xie, Yuan

Volltext

Cost-effective integration of three-dimensional (3D) ICs emphasizing testing cost analysis von Yibo Chen, Dimin Niu, Yuan Xie, Chakrabarty, K

Volltext

Impact of Write Pulse and Process Variation on 22 nm FinFET-Based STT-RAM Design: A Device-Architecture Co-Optimization Approach von Xu, Cong, Zheng, Yang, Niu, Dimin, Zhu, Xiaochun, Kang, Seung H., Xie, Yuan

Volltext

Energy-efficient multi-level cell phase-change memory system with data encoding von Jue Wang, Xiangyu Dong, Guangyu Sun, Dimin Niu, Yuan Xie

Volltext

A Hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement von Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, Hai Li

Volltext

Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping von Li, Xingchen, Yuan, Zhihang, Guan, Yijin, Sun, Guangyu, Zhang, Tao, Wei, Rongshan, Niu, Dimin

Volltext

MNSIM 2.0: A Behavior-Level Modeling Tool for Processing-In-Memory Architectures von Zhu, Zhenhua, Sun, Hanbo, Xie, Tongxin, Zhu, Yu, Dai, Guohao, Xia, Lixue, Niu, Dimin, Chen, Xiaoming, Hu, X. Sharon, Cao, Yu, Xie, Yuan, Yang, Huazhong, Wang, Yu

Volltext

A Tightly Coupled AI-ISP Vision Processor von Zhang, Hao, Li, Sicheng, Gui, Yupeng, Li, Zhiyong, Xu, Shusong, Lu, Yanheng, Niu, Dimin, Zheng, Hongzhong, Chen, Yen-Kuang, Xie, Yuan, Fan, Yibo

Volltext

DLUX: A LUT-Based Near-Bank Accelerator for Data Center Deep Learning Training Workloads von Gu, Peng, Xie, Xinfeng, Li, Shuangchen, Niu, Dimin, Zheng, Hongzhong, Malladi, Krishna T., Xie, Yuan

Volltext

STAR: Synthesis of Stateful Logic in RRAM Targeting High Area Utilization von Wang, Feng, Luo, Guojie, Sun, Guangyu, Zhang, Jiaxi, Kang, Jinfeng, Wang, Yuhao, Niu, Dimin, Zheng, Hongzhong

Volltext

Accelerating Distributed GNN Training by Codes von Wang, Yanhong, Guan, Tianchan, Niu, Dimin, Zou, Qiaosha, Zheng, Hongzhong, Shi, C.-J. Richard, Xie, Yuan

Volltext

SAFE: A Scalable Homomorphic Encryption Accelerator for Vertical Federated Learning von Chen, Zhaohui, Gu, Zhen, Lu, Yanheng, Ren, Xuanle, Zhong, Ruiguang, Lu, Wen-jie, Zhang, Jiansong, Zhang, Yichi, Wu, Hanghang, Zheng, Xiaofu, Liu, Heng, Chu, Tingqiang, Hong, Cheng, Wei, Changzheng, Niu, Dimin, Xie, Yuan

Volltext

MPU: Memory-Centric SIMT Processor via In-DRAM Near-Bank Computing von Xie, Xinfeng, Gu, Peng, Ding, Yufei, Niu, Dimin, Zheng, Hongzhong, Xie, Yuan

Volltext

Impact of Cell Failure on Reliable Cross-Point Resistive Memory Design von Xu, Cong, Niu, Dimin, Zheng, Yang, Yu, Shimeng, Xie, Yuan

Volltext

DRAF: A Low-Power DRAM-based Reconfigurable Acceleration Fabric von Gao, Mingyu, Delimitrou, Christina, Niu, Dimin, Malladi, Krishna, Zheng, Hongzhong, Brennan, Bob, Kozyrakis, Christos

Volltext