A Fast Startup Crystal Oscillator Using Impedance Guided Chirp Injection in 22 nm FinFET CMOS von Luo, Hao, Kundu, Somnath, Huusari, Timo, Shahraini, Sarah, Alban, Eduardo, Mix, Jason, Kurd, Nasser, Abdel-Moneum, Mohamed, Carlton, Brent

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Next Generation Intel¯ Core™ Micro-Architecture (Nehalem) Clocking von Kurd, N., Mosalikanti, P., Neidengard, M., Douglas, J., Kumar, R.

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A Family of 32 nm IA Processors von Kurd, Nasser A, Bhamidipati, Subramani, Mozak, Chris, Miller, Jeffrey L, Mosalikanti, Praveen, Wilson, Timothy M, El-Husseini, Ali M, Neidengard, Mark, Aly, Ramy E, Nemani, Mahadev, Chowdhury, Muntaquim, Kumar, Rajesh

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Haswell: A Family of IA 22 nm Processors von Kurd, Nasser, Chowdhury, Muntaquim, Burton, Edward, Thomas, Thomas P., Mozak, Christopher, Boswell, Brent, Mosalikanti, Praveen, Neidengard, Mark, Deval, Anant, Khanna, Ashish, Chowdhury, Nasirul, Rajwar, Ravi, Wilson, Timothy M., Kumar, Rajesh

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Improving SIMO-Regulated Digital SoC Energy Efficiencies Through Adaptive Clocking and Concurrent Domain Control von Huang, Chi-Hsiang, Chen, Yidong, Sun, Xun, Mandal, Arindam, Pamula, Venkata Rajesh, Kurd, Nasser, Sathe, Visvesh S.

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A Compact First-Order \Sigma\Delta Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process von Oshita, Takao, Shor, Joseph, Duarte, David E., Kornfeld, Avner, Geannopoulos, George L., Douglas, Jonathan, Kurd, Nasser

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A Compact First-Order Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process von Oshita, Takao, Shor, Joseph, Duarte, David E, Kornfeld, Avner, Geannopoulos, George L, Douglas, Jonathan, Kurd, Nasser

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A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS von Shen, Kuan-Yueh, Syed Farooq, Syed Feruz, Fan, Yongping, Nguyen, Khoa Minh, Wang, Qi, Neidengard, Mark L., Kurd, Nasser, Elshazly, Amr

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A multigigahertz clocking scheme for the Pentium(R) 4 microprocessor von Kurd, N.A., Barkarullah, J.S., Dizon, R.O., Fletcher, T.D., Madland, P.D.

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Adaptive Frequency and Biasing Techniques for Tolerance to Dynamic Temperature-Voltage Variations and Aging von Tschanz, James, Kim, Nam Sung, Dighe, Saurabh, Howard, Jason, Ruhl, Gregory, Vangal, Sriram, Narendra, Siva, Hoskote, Yatin, Wilson, Howard, Lam, Carol, Shuman, Matthew, Tokunaga, Carlos, Somasekhar, Dinesh, Tang, Stephen, Finan, David, Karnik, Tanay, Borkar, Nitin, Kurd, Nasser, De, Vivek

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Westmere: A family of 32nm IA processors von Kurd, N.A., Bhamidipati, S., Mozak, C., Miller, J.L., Wilson, T.M., Nemani, M., Chowdhury, M.

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Low power apparatus and method to multiply frequency of a clock von Kurd, Nasser, Shen, Kuan-Yueh

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FREQUENCY OVERSHOOT AND VOLTAGE DROOP MITIGATION APPARATUS AND METHOD von KURD, Nasser A, MOSALIKANTI, Praveen, GENDLER, Alexander

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Frequency overshoot and voltage droop mitigation apparatus and method von Kurd, Nasser A, Gendler, Alexander, Mosalikanti, Praveen

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LOW LATENCY ADAPTIVE CLOCKING von Kurd, Nasser, Mosalikanti, Praveen

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LOW POWER APPARATUS AND METHOD TO MULTIPLY FREQUENCY OF A CLOCK von Kurd, Nasser, Shen, Kuan-Yueh

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Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses von Ghoneima, M.M., Khellah, M.M., Tschanz, J., Yibin Ye, Kurd, N., Barkatullah, J.S., Nimmagadda, S., Ismail, Y., De, V.K.

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Monitor circuitry for power management and transistor aging tracking von Kurd, Nasser A, Shen, Kuan-Yueh, Fallin, John

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LOW LATENCY ADAPTIVE CLOCKING von MOSALIKANTI, Praveen, KURD, Nasser

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VOLTAGE DROOP DETECTION AND FREQUENCY RECOVERY von Grossnickle, Vaughn J, Kurd, Nasser A, Mosalikanti, Praveen

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