A novel cryptoprocessor architecture for chained Merkle signature scheme von Shoufan, Abdulhadi, Huber, Nico, Gregor Molter, H.

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A Novel Cryptoprocessor Architecture for the McEliece Public-Key Cryptosystem von Shoufan, Abdulhadi, Wink, Thorsten, Molter, H Gregor, Huss, Sorin A, Kohnert, Eike

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A Timing Attack against Patterson Algorithm in the McEliece PKC von Shoufan, Abdulhadi, Strenzke, Falko, Molter, H. Gregor, Stöttinger, Marc

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A simple power analysis attack on a McEliece cryptoprocessor von Molter, H. Gregor, Stöttinger, Marc, Shoufan, Abdulhadi, Strenzke, Falko

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SC-DEVS: An efficient SystemC extension for the DEVS model of computation von Madlener, F., Molter, H.G., Huss, S.A.

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Side Channels in the McEliece PKC von Strenzke, Falko, Tews, Erik, Molter, H. Gregor, Overbeck, Raphael, Shoufan, Abdulhadi

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Automated Generation of Embedded Systems Software from Timed DEVS Model of Computation Specifications von Molter, H. G., Kohlmann, J., Huss, S. A.

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The DEVS model of computation A foundation for a novel embedded systems design methodology von Molter, H. G., Huss, S. A.

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State space optimization within the DEVS model of computation for timing efficiency von Molter, H. G., Seffrin, A., Huss, S. A.

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DEVS2VHDL: Automatic transformation of XML-specified DEVS Model of Computation into synthesizable VHDL code von Molter, H.G., Seffrin, A., Huss, S.A.

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A System Level Design Flow for Embedded Systems based on Model of Computation Mappings von Molter, H. Gregor, Madlener, Felix, Huss, Sorin A.

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An Efficient FPGA Implementation for an DECT Brute-Force Attacking Scenario von Molter, H.G., Ogata, K., Tews, E., Weinmann, R.-P.

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A Novel Multiple Core Co-processor Architecture for Efficient Server-Based Public Key Cryptographic Applications von Laue, R., Molter, H.G., Rieder, F., Huss, S.A., Saxena, K.

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