AMUSE: a minimally-unsatisfiable subformula extractor von Oh, Yoonna, Mneimneh, Maher N., Andraus, Zaher S., Sakallah, Karem A., Markov, Igor L.

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A branch and bound algorithm for extracting smallest minimal unsatisfiable subformulas von Liffiton, Mark, Mneimneh, Maher, Lynce, Inês, Andraus, Zaher, Marques-Silva, João, Sakallah, Karem

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Pedestrian intent yielding von Mneimneh, Maher, Yan, Qiaojing, Dorsey, Anne Hobbs

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Computing Vertex Eccentricity in Exponentially Large Graphs: QBF Formulation and Solution von Mneimneh, Maher, Sakallah, Karem

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PEDESTRIAN INTENT YIELDING von Mneimneh, Maher, Yan, Qiaojing, Dorsey, Anne Hobbs

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PEDESTRIAN INTENT YIELDING von YAN, Qiaojing, DORSEY, Anne Hobbs, MNEIMNEH, Maher

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A Branch-and-Bound Algorithm for Extracting Smallest Minimal Unsatisfiable Formulas von Mneimneh, Maher, Lynce, Inês, Andraus, Zaher, Marques-Silva, João, Sakallah, Karem

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KNOWLEDGE DISTILLATION FOR AUTONOMOUS VEHICLES von Chen, Haoyu, Ding, Kai, Wang, Minfa, Mneimneh, Maher, Chai, Wei

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KNOWLEDGE DISTILLATION FOR AUTONOMOUS VEHICLES von DING, Kai, CHEN, Haoyu, WANG, Minfa, CHAI, Wei, MNEIMNEH, Maher

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Scalable hybrid verification of complex microprocessors von Mneimneh, Maher, Aloul, Fadi, Weaver, Chris, Chatterjee, Saugata, Sakallah, Karem, Austin, Todd

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System and methods for reasonable functional verification of an integrated circuit design von SARWARY MOHAMAD SHAKER, MNEIMNEH MAHER

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System and method for managing and composing verification engines von Jain, Paras Mal, Rahim, Fahim, Sarwary, Mohamed Shaker, Mneimneh, Maher, Cotton, Scott, Mondal, Sudeep

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Microprocessor Simulation and Program Assembling Using Spreadsheets von El-Hajj, Ali, Kabalan, Karim Y., Mneimneh, Maher, Karablieh, Feras

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Search-based SAT using zero-suppressed BDDs von Aloul, F.A., Mneimneh, M.N., Sakallah, K.A.

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System and method for a hybrid clock domain crossing verification von MNEIMNEH MAHER, SARWARY MOHAMED SHAKER, MOVAHED-EZAZI MOHAMMAD H

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SYSTEM AND METHOD FOR MANAGING AND COMPOSING VERIFICATION ENGINES von Cotton Scott, Sarwary Mohamed Shaker, Mondal Sudeep, Rahim Fahim, Jain Paras Mal, Mneimneh Maher

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SYSTEM AND METHOD FOR A HYBRID CLOCK DOMAIN CROSSING VERIFICATION von MNEIMNEH MAHER, SARWARY MOHAMED SHAKER, MOVAHED-EZAZI MOHAMMAD H

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System and method for netlist clock domain crossing verification von Kumar Biswas Pronay, Gupta Nishant, Sarwary Mohamed Shaker, Mal Jain Paras, Ganai Malay, Mneimneh Maher, Movahed-Ezazi Mohammad Homayoun

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SYSTEM AND METHOD FOR NETLIST CLOCK DOMAIN CROSSING VERIFICATION von Kumar Biswas Pronay, Gupta Nishant, Sarwary Mohamed Shaker, Mal Jain Paras, Ganai Malay, Mneimneh Maher, Movahed-Ezazi Mohammad Homayoun

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Principles of sequential-equivalence verification von Mneimneh, M.N., Sakallah, K.A.

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