A 1-MHZ bandwidth 3.6-GHz 0.18-μm CMOS fractional-N synthesizer utilizing a hybrid PFD/DAC structure for reduced broadband phase noise von MENINGER, Scott E, PERROTT, Michael H

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On the Feasibility of 1T Ferroelectric FET Memory Array von Jiang, Zhouhang, Zhao, Zijian, Deng, Shan, Xiao, Yi, Xu, Yixin, Mulaosmanovic, Halid, Duenkel, Stefan, Beyer, Sven, Meninger, Scott, Mohamed, Mohamed, Joshi, Rajiv, Gong, Xiao, Kurinec, Santosh, Narayanan, Vijaykrishnan, Ni, Kai

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Powering Disturb-Free Reconfigurable Computing and Tunable Analog Electronics with Dual-Port Ferroelectric FET von Zhao, Zijian, Deng, Shan, Chatterjee, Swetaki, Jiang, Zhouhang, Islam, Muhammad Shaffatul, Xiao, Yi, Xu, Yixin, Meninger, Scott, Mohamed, Mohamed, Joshi, Rajiv, Chauhan, Yogesh Singh, Mulaosmanovic, Halid, Duenkel, Stefan, Kleimaier, Dominik, Beyer, Sven, Amrouch, Hussam, Narayanan, Vijaykrishnan, Ni, Kai

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Time-Domain CMOS Temperature Sensors With Dual Delay-Locked Loops for Microprocessor Thermal Monitoring von Dongwan Ha, Kyoungho Woo, Meninger, S., Xanthopoulos, T., Crain, E., Donhee Ham

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Paving the Way for Pass Disturb-Free Vertical NAND Storage via a Dedicated and String-Compatible Pass Gate von Zhao, Zijian, Woo, Sola, Aabrar, Khandker Akif, Kirtania, Sharadindu Gopal, Jiang, Zhouhang, Deng, Shan, Xiao, Yi, Mulaosmanovic, Halid, Duenkel, Stefan, Kleimaier, Dominik, Soss, Steven, Beyer, Sven, Joshi, Rajiv, Meninger, Scott, Mohamed, Mohamed, Kim, Kijoon, Woo, Jongho, Lim, Suhwan, Kim, Kwangsoo, Kim, Wanki, Ha, Daewon, Narayanan, Vijaykrishnan, Datta, Suman, Yu, Shimeng, Ni, Kai

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A 0.009 mm2 Wide-Tuning Range Automatically Placed-and-Routed ADPLL in 14-nm FinFET CMOS von Moore, David M., Xanthopoulos, Thucydides, Meninger, Scott, Wentzloff, David D.

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Vibration-to-electric energy conversion von Meninger, S., Mur-Miranda, J.O., Amirtharajah, R., Chandrakasan, A., Lang, J.H.

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A 0.009 mm 2 Wide-Tuning Range Automatically Placed-and-Routed ADPLL in 14-nm FinFET CMOS von Moore, David M., Xanthopoulos, Thucydides, Meninger, Scott, Wentzloff, David D.

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Extraction and Simulation of the Impact of Flux Trapping in Moats of AC-Biased Shift Registers von Meninger, Scott E, Tolpygo, Sergey K

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Dual-DLL-based CMOS all-digital temperature sensor for microprocessor thermal monitoring von Kyoungho Woo, Meninger, S., Xanthopoulos, T., Crain, E., Dongwan Ha, Donhee Ham

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Serializer/deserializer (SerDes) lanes with lane-by-lane datarate independence von Meninger, Scott E

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A fractional- N frequency synthesizer architecture utilizing a mismatch compensated PFD/DAC structure for reduced quantization-induced phase noise von Meninger, S.E., Perrott, M.H.

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Extraction and Simulation of the Impact of Flux Trapping in Moats of AC-Biased Shift Registers von Meninger, Scott E, Tolpygo, Sergey K

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Serializer/Deserializer (SerDes) Lanes with Lane-by-Lane Datarate Independence von Meninger, Scott E

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Serializer/Deserializer (SerDes) lanes with lane-by-lane datarate independence von Meninger, Scott E

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Serializer/Deserializer (SerDes) Lanes with Lane-by-Lane Datarate Independence von Meninger, Scott E

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SERIALIZER/DESERIALIZER (SERDES) LANES WITH LANE-BY-LANE DATARATE INDEPENDENCE von MENINGER, Scott E

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Serializer/deserializer (SerDes) lanes with lane-by-lane datarate independence von Meninger, Scott E

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Serializer/Deserializer (SerDes) Lanes with Lane-by-Lane Datarate Independence von Meninger, Scott E

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Serializer/deserializer (SerDes) lanes with lane-by-lane datarate independence von Meninger, Scott E

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