From Process Corners to Statistical Circuit Design Methodology: Opportunities and Challenges von Dongaonkar, Sourabh, Mudanai, Sivakumar P., Giles, Martin D.

Volltext

Compact Modeling of Magnetic Tunneling Junctions von Roy, Ananda S., Sarkar, Angik, Mudanai, Sivakumar P.

Volltext

Compact Model for Ultrathin Low Electron Effective Mass Double Gate MOSFET von Roy, Ananda S., Mudanai, Sivakumar P., Basu, Dipanjan, Stettler, Mark A.

Volltext

Mechanism of Long-Channel Drain-Induced Barrier Lowering in Halo MOSFETs von Roy, A S, Mudanai, S P, Stettler, M

Volltext

Process Technology Variation von Kuhn, K. J., Giles, M. D., Becher, D., Kolar, P., Kornfeld, A., Kotlyar, R., Ma, S. T., Maheshwari, A., Mudanai, S.

Volltext

Compressive Uniaxial Stress Bandstructure Engineering for Transferred-Hole Devices von Kotlyar, Roza, Giles, Martin D, Mudanai, Sivakumar P, Kuhn, Kelin J, Cea, Stephen M, Linton, Thomas D, Pillarisetty, Ravi

Volltext

An Improved Flicker Noise Model for Circuit Simulations von Roy, Ananda S., Sungwon Kim, Mudanai, Sivakumar P.

Volltext

Capacitance Compact Model for Ultrathin Low-Electron-Effective-Mass Materials von Mudanai, S., Roy, A., Kotlyar, R., Rakshit, T., Stettler, M.

Volltext

A novel Si/SiGe heterojunction pMOSFET with reduced short-channel effects and enhanced drive current von Qiqing Ouyang, Xiangdong Chen, Mudanai, S.P., Xin Wang, Kencke, D.L., Tasch, A.F., Register, L.F., Banerjee, S.K.

Volltext

Process Technology Variation : CHARACTERIZATION OF NANO CMOS VARIABIALITY BY SIMULATION AND MEASUREMENTS von KUHN, Kelin J, GILES, Martin D, BECHER, David, KOLAR, Pramod, KORNFELD, Avner, KOTLYAR, Roza, MA, Sean T, MAHESHWARI, Atul, MUDANAI, Sivakumar

Volltext

A physically based compact gate C-V model for ultrathin (EOT /spl sim/1 nm and below) gate dielectric MOS devices von Fei Li, Mudanai, S., Register, L.F., Banerjee, S.K.

Volltext

Analytical Modeling of Output Conductance in Long-Channel Halo-Doped MOSFETs von Mudanai, S., Wei-Kai Shih, Rios, R., Xuemei Xi, Jung-Hoon Rhew, Kuhn, K., Packan, P.

Volltext

Modeling of direct tunneling current through gate dielectric stacks von Mudanai, S., Yang-Yu Fan, Qiqing Ouyang, Tasch, A.F., Banerjee, S.K.

Volltext

Physically based quantum-mechanical compact model of MOS devices substrate-injected tunneling current through ultrathin (EOT ∼ 1 nm) SiO2 and high-κ gate stacks von FEI LI, MUDANAI, Sivakumar P, FAN, Yang-Yu, REGISTER, Leonard Franklin, BANERJEE, Sanjay K

Volltext

JUNCTIONLESS ACCUMULATION-MODE DEVICE ISOLATED FROM SEMICONDUCTIVE SUBSTRATE BY REVERSE-BIAS JUNCTION von RIOS RAFAEL, MUDANAI SIVAKUMAR, RAKSHIT TITASH, CAPPELLANI ANNALISA, KUHN KELIN J

Volltext bestellen

Junctionless accumulation-mode devices on decoupled prominent architectures von RIOS RAFAEL, MUDANAI SIVAKUMAR, RAKSHIT TITASH, CAPPELLANI ANNALISA, KUHN KELIN J

Volltext bestellen

JUNCTIONLESS ACCUMULATION-MODE DEVICES ON DECOUPLED PROMINENT ARCHITECTURES von RIOS RAFAEL, MUDANAI SIVAKUMAR, RAKSHIT TITASH, CAPPELLANI ANNALISA, KUHN KELIN J

Volltext bestellen

Junctionless accumulation-mode devices on prominent architectures, and methods of making same von RIOS RAFAEL, RAKSHIT TITASH, MUDANAI SIVAKUMAR P, CAPPELLANI ANNALISA, KUHN KELIN J

Volltext bestellen

An efficient surface potential solution algorithm for compact MOSFET models von Rios, R., Mudanai, S., Wei-Kai Shih, Packan, P.

Volltext bestellen

JUNCTIONLESS ACCUMULATION-MODE DEVICES ON PROMINENT ARCHITECTURES, AND METHODS OF MAKING SAME von RIOS RAFAEL, RAKSHIT TITASH, MUDANAI SIVAKUMAR P, CAPPELLANI ANNALISA, KUHN KELIN J

Volltext bestellen