Quest for Low-Voltage and Low-Power Integrated Circuits: Towards a Sustainable Future von Masuhara, Toshiaki

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IEEE Journal of Solid State Circuits: The Evolution and Future of This Flagship Publication von Masuhara, Toshiaki

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Low energy silicon solution toward smart and sustainable society von Masuhara, Toshiaki

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The Future of Low-Power Electronics von Masuhara, Toshiaki

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Challenge of low voltage and low power IC toward sustainable future von Masuhara, T.

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High Packing Density, High Speed CMOS (Hi-CMOS) Device Technology von Sakai, Yoshio, Masuhara, Toshiaki, Minato, Osamu, Hashimoto, Norikazu

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Overview of CMOS Technology Development in the MIRAI Project von Masuhara, Toshiaki, Hirose, Masataka

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Buried J-FET Powered Static RAM Cell von Minato, Osamu, Sakai, Yoshio, Masuhara, Toshiaki, Sasaki, Toshio

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Soft Error Rate Analysis Model (SERAM) for Dynamic NMOS RAMs von Aoki, Masaaki, Toyabe, Toru, Shinoda, Takashi, Masuhara, Toshiaki, Asai, Shojiro, Kawamoto, Hiroshi, Mususada, Kazumichi

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Low-Temperature ULSI Device Technology von Aoki, Masaaki, Masuhara, Toshiaki

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Analytical Technique for the Design of DMOS Transistors von Masuhara, Toshiaki, Muller, Richard S.

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Performance and hot-carrier effects of small CRYO-CMOS devices von Aoki, M., Hanamura, S., Masuhara, T., Yano, K.

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JPS6341451B von MASUHARA TOSHIAKI

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Operation of bulk CMOS devices at very low temperatures von Hanamura, H., Aoki, M., Masuhara, T., Minato, O., Sakai, Y., Hayashida, T.

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COMPLEMENTARY TYPE MOSSIC von MASUHARA TOSHIAKI

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Fully symmetric cooled CMOS on (110) plane von AOKI, M, YANO, K, MASUHARA, T, SHIMOHIGASHI, K

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A 15-ns 1-Mbit CMOS SRAM von Sasaki, K., Hanamura, S., Ueda, K., Oono, T., Minato, O., Sakai, Y., Meguro, S., Tsunematsu, M., Masuhara, T., Kubotera, M., Toyoshima, H.

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Low-temperature CMOS 8 × 8 bit multipliers with sub-10-ns speeds von Hanamura, S., Aoki, M., Masuhara, T., Minato, O., Sakai, Y., Hayashida, T.

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JPH0312473B von SAKAI YOSHIO, MASUHARA TOSHIAKI

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JPH0213822B von SAKAI YOSHIO, MASUHARA TOSHIAKI

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