Transient circuit implementation of arc models with particular focus on arcs in low-voltage power cables von Litovski, Vančo B., Blond, Simon P. Le, Ross, Brian P.

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Maximally Flat Filter Functions With the Maximum Number of Transmission Zeros Having Maximal Multiplicity von Andrejevic Stosovic, Miona V., Zivanic, Jaroslav M., Litovski, Vanco B.

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Implementation of Recurrent Artificial Neural Networks for Nonlinear Dynamic Modeling in Biomedical Applications von Stošović, Miona V. Andrejević, Litovski, Vančo B.

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Non-Linear Load Characterisation Using Orthogonal Apparent Power Decompositions von Dimitrijevic, Marko A., Stevanovic, Dejan, Litovski, Vanco B.

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Grid‐Enabled Parallel Simulation Based on Parallel Equation Formulation von Andjelković, Bojan, Litovski, Vančo B., Zerbe, Volker

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Transient circuit implementation of arc models with particular focus on arcs in low-voltage power cables von Litovski, Vanco B, Le Blond, Simon P, Ross, Brian P

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Concurrent analogue fault simulation, the equation formulation aspect von Litovski, Vančo B., Litovski, Ivan V., Zwoliński, Mark

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A second order s-to-z transform and its implementation to IIR filter design von Mirkovic, Dejan Dragan, Petkovic, Predrag M, Litovski, Vanco B

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Statistical delay estimation in digital circuits using VHDL von Milic, Miljana, Litovski, Vanco

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Grid-Enabled Parallel Simulation Based on Parallel Equation Formulation von Andjelkovic, Bojan, Litovski, Vanco B, Zerbe, Volker

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Fault models of CMOS transmission gate von Milovanovic, Dragisa P., Litovski, Vanco B.

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Procedural analog design (PAD) tool von Stefanovic, D., Kayal, M., Pastre, M., Litovski, V.B.

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Inverse circuit simulation method for topological delays estimation with logic simulator von Maksimovic, D.M., Litovski, V.B.

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Simulation of non-linear magnetic circuits modelled using artificial neural network von Litovski, Vančo B., Mrčarica, Željko, Ilić, Tihomir

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Motion Perception Via Two Channels Correlation Mechanism: VLSI Proposal for an Object Tracking System Implementation von Shutinoski, Goce V., Dzhekov, Tomislav A., Litovski, Vanco B.

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Symbolic fault modelling of MOS combinational circuits von Petković, Predrag M., Milovanović, Dragiša P., Litovski, VancǒB.

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Fault models of CMOS circuits von Milovanović, Dragiša P., Litovski, Vančo B.

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Analytical approach to the placement problem in gate-arrays von Milenkovic, S.L., Litovski, V.B.

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A new ideal switch model for time-domain circuit analysis von MRČARICA, ŽELJKO M., LITOVSKI, VANČO B.

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Using VHDL Simulator to Estimate Logic Path Delays in Combinational and Embedded Sequential Circuits von Sokolovic, M.L., Litovski, V.B.

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