A 130.7- \hbox^ 2-Layer 32-Gb ReRAM Memory Device in 24-nm Technology von Tz-yi Liu, Tian Hong Yan, Scheuerlein, Roy, Yingchang Chen, Lee, Jeffrey KoonYee, Balakrishnan, Gopinath, Yee, Gordon, Zhang, Henry, Yap, Alex, Ouyang, Jingwen, Sasaki, Takahiko, Al-Shamma, Ali, Chen, Chinyu, Gupta, Mayank, Hilton, Greg, Kathuria, Achal, Lai, Vincent, Matsumoto, Masahide, Nigam, Anurag, Pai, Anil, Pakhale, Jayesh, Chang Hua Siau, Xiaoxia Wu, Yibo Yin, Nagel, Nicolas, Tanaka, Yoichiro, Higashitani, Masaaki, Minvielle, Tim, Gorla, Chandu, Tsukamoto, Takayuki, Yamaguchi, Takeshi, Okajima, Mutsumi, Okamura, Takayuki, Takase, Satoru, Inoue, Hirofumi, Fasoli, Luca

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WORD LINE COMPENSATION FOR NON-VOLATILE MEMORY ARRAYS von NIGAM, Anurag, YAN, Thomas, CHEN, Yingchang, SIAU, Chang, LEE, Jeffrey Koonyee

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Word line compensation for memory arrays von Nigam Anurag, Yan Thomas, Chen Yingchang, Siau Chang, Lee Jeffrey Koonyee

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