Performance Estimation of Streaming Media Applications for Reconfigurable Platforms von Reuter, Carsten, Martín Langerwerf, Javier, Stolberg, Hans-Joachim, Pirsch, Peter

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RAPANUI: Rapid Prototyping for Media Processor Architecture Exploration von Vayá, Guillermo Payá, Langerwerf, Javier Martín, Pirsch, Peter

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A Multi-Shared Register File Structure for VLIW Processors von Payá-Vayá, Guillermo, Martín-Langerwerf, Javier, Pirsch, Peter

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An Enhanced DMA Controller in SIMD Processors for Video Applications von Payá-Vayá, Guillermo, Martín-Langerwerf, Javier, Moch, Sören, Pirsch, Peter

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TECHNIQUES TO REDUCE POWER CONSUMPTION FOR A DISTRIBUTED COMPUTATIONAL MODEL MAPPED ONTO A MULTI-PROCESSING NODE SYSTEM von LEIJTEN, Jeroen, MARTIN LANGERWERF, Javier, EGELMEERS, Gerard, KONJETI, Venkata Sudhir

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Instruction merging to increase parallelism in VLIW architectures von Paya-Vaya, G., Martin-Langerwerf, J., Giesemann, F., Blume, H., Pirsch, P.

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Design Space Exploration of Media Processors: A Generic VLIW Architecture and a Parameterized Scheduler von Payá-Vayá, Guillermo, Martín-Langerwerf, Javier, Taptimthong, Piriya, Pirsch, Peter

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Design Space Exploration of Media Processors: A Parameterized Scheduler von Paya-Vaya, G., Martin-Langerwerf, J., Taptimthong, P., Pirsch, P.

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A forwarding-sensitive instruction scheduling approach to reduce register file constraints in VLIW architectures von Payá-Vayá, G, Martin-Langerwerf, J, Blume, H, Pirsch, P

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