Reuse Zoo von Luan, Xiaokun Luan

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HeatC: A Variable-Grained Coverage Criterion for Deep Learning Systems von Sun, Weidi, Lu, Yuteng, Luan, Xiaokun, Sun, Meng

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Protecting Deep Learning Model Copyrights with Adversarial Example-Free Reuse Detection von Luan, Xiaokun, Zhang, Xiyue, Wang, Jingyi, Sun, Meng

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Generically Automating Separation Logic by Functors, Homomorphisms and Modules von Xu, Qiyuan, Sanan, David, Hou, Zhe, Luan, Xiaokun, Watt, Conrad, Liu, Yang

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A physical implementation method based on Innovus to improve chip performance von Bian Shaoxian, David He, Luan Xiaokun, Jiang Jianfeng, Zhai Feixue, Cai Zhun

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Towards Large Language Model Aided Program Refinement von Cai, Yufan, Hou, Zhe, Luan, Xiaokun, Baena, David Miguel Sanan, Lin, Yun, Sun, Jun, Dong, Jin Song

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The Fusion of Large Language Models and Formal Methods for Trustworthy AI Agents: A Roadmap von Zhang, Yedi, Cai, Yufan, Zuo, Xinyue, Luan, Xiaokun, Wang, Kailong, Hou, Zhe, Zhang, Yifan, Wei, Zhiyuan, Sun, Meng, Sun, Jun, Sun, Jing, Dong, Jin Song

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Protecting Deep Learning Model Copyrights with Adversarial Example-Free Reuse Detection von Luan, Xiaokun, Zhang, Xiyue, Wang, Jingyi, Sun, Meng

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Chip wiring design method and device, storage medium and electronic equipment von LUAN XIAOKUN, HUANG WEI

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Layout optimization method and device for clock tree and related equipment von LUAN XIAOKUN, JIANG JIANFENG

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Towards Large Language Model Aided Program Refinement von Cai, Yufan, Hou, Zhe, Luan, Xiaokun, David Miguel Sanan Baena, Lin, Yun, Sun, Jun, Jin Song Dong

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The Fusion of Large Language Models and Formal Methods for Trustworthy AI Agents: A Roadmap von Zhang, Yedi, Cai, Yufan, Zuo, Xinyue, Luan, Xiaokun, Wang, Kailong, Hou, Zhe, Zhang, Yifan, Wei, Zhiyuan, Sun, Meng, Sun, Jun, Sun, Jing, Jin Song Dong

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CHIP DESIGN METHOD, INSTRUMENT, APPARATUS, READABLE STORAGE MEDIUM, AND PROGRAM PRODUCT von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, JIANG, Jianfeng, HUANG, Wei, LUAN, Xiaokun

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METHOD, SYSTEM, APPARATUS, MEDIUM, AND PROGRAM FOR PHYSICAL DESIGN WIRING AND OPTIMIZATION von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, HUANG, Wei, JIANG, Jianfeng, LUAN, Xiaokun

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METHOD, SYSTEM, MEDIUM, AND PROGRAM PRODUCT FOR PATH VERIFICATION IN LOGIC CIRCUIT von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, HUANG, Wei, JIANG, Jianfeng, LUAN, Xiaokun

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METHOD, SYSTEM, MEDIUM, AND PROGRAM PRODUCT FOR PATH VERIFICATION IN LOGIC CIRCUIT von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, HUANG, Wei, JIANG, Jianfeng, LUAN, Xiaokun

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METHOD, SYSTEM, MEDIUM AND PROGRAM FOR CLOCK DESIGN OF PHYSICAL PARTITION STRUCTURE von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, JIANG, Jianfeng, HUANG, Wei, LUAN, Xiaokun

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METHOD, DEVICE, APPARATUS, READABLE STORAGE MEDIUM, AND PROGRAM PRODUCT OF CHIP DESIGN von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, JIANG, Jianfeng, HUANG, Wei, LUAN, Xiaokun

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METHOD, SYSTEM, APPARATUS, MEDIUM, AND PROGRAM FOR PHYSICAL DESIGN WIRING AND OPTIMIZATION von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, HUANG, Wei, JIANG, Jianfeng, LUAN, Xiaokun

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CHIP DESIGN METHOD, INSTRUMENT, APPARATUS, READABLE STORAGE MEDIUM, AND PROGRAM PRODUCT von CHEN, Zhanzhi, JIN, Wenjiang, WANG, Cuina, DENG, Yu, BIAN, Shaoxian, SUN, Yongfeng, TANG, Tao, JIANG, Jianfeng, HUANG, Wei, LUAN, Xiaokun

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