A 4-Kb 1-to-8-bit Configurable 6T SRAM-Based Computation-in-Memory Unit-Macro for CNN-Based AI Edge Processors von Chiu, Yen-Cheng, Zhang, Zhixiao, Chen, Jia-Jing, Si, Xin, Liu, Ruhui, Tu, Yung-Ning, Su, Jian-Wei, Huang, Wei-Hsing, Wang, Jing-Hong, Wei, Wei-Chen, Hung, Je-Min, Sheu, Shyh-Shyuan, Li, Sih-Han, Wu, Chih-I, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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Design of a Compact GaN MMIC Doherty Power Amplifier and System Level Analysis With X-Parameters for 5G Communications von Li, Sih-Han, Hsu, Shawn S. H., Zhang, Jie, Huang, Keh-Ching

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A 8-b-Precision 6T SRAM Computing-in-Memory Macro Using Segmented-Bitline Charge-Sharing Scheme for AI Edge Chips von Su, Jian-Wei, Chou, Yen-Chi, Liu, Ruhui, Liu, Ta-Wei, Lu, Pei-Jung, Wu, Ping-Chun, Chung, Yen-Lin, Hong, Li-Yang, Ren, Jin-Sheng, Pan, Tianlong, Jhang, Chuan-Jia, Huang, Wei-Hsing, Chien, Chih-Han, Mei, Peng-I, Li, Sih-Han, Sheu, Shyh-Shyuan, Chang, Shih-Chieh, Lo, Wei-Chung, Wu, Chih-I, Si, Xin, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Edge Chips von Su, Jian-Wei, Si, Xin, Chou, Yen-Chi, Chang, Ting-Wei, Huang, Wei-Hsing, Tu, Yung-Ning, Liu, Ruhui, Lu, Pei-Jung, Liu, Ta-Wei, Wang, Jing-Hong, Chung, Yen-Lin, Ren, Jin-Sheng, Chang, Fu-Chun, Wu, Yuan, Jiang, Hongwu, Huang, Shanshi, Li, Sih-Han, Sheu, Shyh-Shyuan, Wu, Chih-I, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Yu, Shimeng, Chang, Meng-Fan

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A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips von Wu, Ping-Chun, Su, Jian-Wei, Hong, Li-Yang, Ren, Jin-Sheng, Chien, Chih-Han, Chen, Ho-Yu, Ke, Chao-En, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Lo, Wei-Chung, Chang, Shih-Chieh, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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An 8b-Precision 6T SRAM Computing-in-Memory Macro Using Time-Domain Incremental Accumulation for AI Edge Chips von Wu, Ping-Chun, Su, Jian-Wei, Chung, Yen-Lin, Hong, Li-Yang, Ren, Jin-Sheng, Chang, Fu-Chun, Wu, Yuan, Chen, Ho-Yu, Lin, Chen-Hsun, Hsiao, Hsu-Ming, Li, Sih-Han, Sheu, Shyh-Shyuan, Chang, Shih-Chieh, Lo, Wei-Chung, Wu, Chih-I, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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8-bit Precision 6T SRAM Compute-in-Memory Macro Using Global Bitline-Combining Scheme for Edge AI Chips von Su, Jian-Wei, Lu, Pei-Jung, Wu, Ping-Chun, Chou, Yen-Chi, Liu, Ta-Wei, Chung, Yen-Lin, Hung, Li-Yang, Ren, Jin-Sheng, Huang, Wei-Hsing, Chien, Chih-Han, Mei, Peng-I, Li, Sih-Han, Sheu, Shyh-Shyuan, Lo, Wei-Chung, Chang, Shih-Chieh, Hong, Hao-Chiao, Lo, Chung-Chuan, Liu, Ren-Shuo, Hsieh, Chih-Cheng, Tang, Kea-Tiong, Chang, Meng-Fan

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Fully Symmetric 3-D Transformers With Through-Silicon via IPD Technology for RF Applications von Li, Sih-Han, Hsu, Shawn S. H., Chen, Kuan-Wei, Lin, Chih-Sheng, Chen, Shang-Chun, Zhang, Jie, Tzeng, Pei-Jer

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A 10-Bit 1280 × 720 Micro-LED Display Driver With 2-Transistor Pixel Circuits and Current-Mode Pulse Width Modulation von Lee, Pei-Yi Lai, Li, Sheng Hui, Hung, Tzu Yi, Yang, Ya-Wen, Li, Sih-Han, Sun, Jian-Jhih, Lin, Chih-Wei David, Lu, Chih-Wen, Fang, Yen-Hsiang, Kuo, Wei-Hung, Huang, Li-Chun, Su, Guo-Dung John, Chen, Poki

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An Ultra Compact Millimeter-Wave VCO in 3-D IC Technology von Sing-Kai Huang, Jing-Yuan Wang, Chiao-Han Lan, Hsu, Shawn S. H., Sih-Han Li, Pei-Ling Tseng, Chih-Sheng Lin, Shyh-Shyuan Sheu

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Reconfigurable CMOS divide-by-3/-5 injection-locked frequency divider for dual-mode 24/40 GHz PLL application von Tzuen-Hsi Huang, Sih-Han Li, Pei-Kang Tsai, Chin-Chih Liu

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Arrayed switch circuit, switching element and system chip package structure von Li, Sih-Han, Zhang, Jie, Lee, Tai-Hsing

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Computing in memory cell von Li, Sih-Han, Hou, Tuo-Hung, Lin, Chih-Sheng, Lin, Yu-Hui, Su, Jian-Wei, Tsai, Fu-Cheng

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Memory device and data weight state determining method for in-memory computation von Li, Sih-Han, Lin, Chih-Sheng, Lin, Yu-Hui, Su, Jian-Wei

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COMPUTING IN MEMORY CELL von Li, Sih-Han, Hou, Tuo-Hung, Lin, Chih-Sheng, Lin, Yu-Hui, Su, Jian-Wei, Tsai, Fu-Cheng

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Computing in memory cell von Li, Sih-Han, Hou, Tuo-Hung, Lin, Chih-Sheng, Lin, Yu-Hui, Su, Jian-Wei, Tsai, Fu-Cheng

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Position-encoding device and method von Li, Sih-Han, Chao, Chang-Po, Chen, Wen-Yu, Chien, Tsai-Kan

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CONFIGURABLE COMPUTING UNIT WITHIN MEMORY von Li, Sih-Han, Mei, Peng-I, Sheu, Shyh-Shyuan, Dai, Jheng Yang, Lin, Chih-Sheng, Su, Jian-Wei

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APPARATUS AND METHOD FOR NEURAL NETWORK COMPUTATION von Li, Sih-Han, Sheu, Shyh-Shyuan, Chang, Shih-Chieh, Su, Jian-Wei, Tsai, Fu-Cheng

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SWITCH CIRCUIT AND PROGRAMMABLE CONNECTION CHIP von ZHANG, Jie, LI, Sih-Han

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