A Methodology for an FPGA Implementation of a Programmable Logic Controller to Control an Atomic Layer Deposition System von Jamieson, Peter, Blank, Donald, Ghanem, Janelle, McGrew, Tyler, Corti, Giancarlo

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Efficient Neural Networks on the Edge with FPGAs by Optimizing an Adaptive Activation Function von Jiang, Yiyue, Vaicaitis, Andrius, Dooley, John, Leeser, Miriam

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Real Time Receiver Baseband Processing Platform for Sub 6 GHz PHY Layer Experiments von Handagala, Suranga, Leeser, Miriam

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Artifact Evaluation for ACM TRETS Papers Submitted from the FPT Journal Track von Leeser, Miriam

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SIFO: Secure Computational Infrastructure Using FPGA Overlays von Fang, Xin, Leeser, Miriam, Ioannidis, Stratis

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Minimum Energy Analysis and Experimental Verification of a Latch-Based Subthreshold FPGA von Grossmann, P. J., Leeser, M. E., Onabajo, M.

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Low Latency Network-on-Chip Router Microarchitecture Using Request Masking Technique von Monemi, Alireza, Marsono, Muhammad Nadzir, Ooi, Chia Yee

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High-Level System Design of IEEE 802.11b Standard-Compliant Link Layer for MATLAB-Based SDR von Subramanian, Ramanathan, Drozdenko, Benjamin, Doyle, Eric, Ahmed, Rameez, Leeser, Miriam, Chowdhury, Kaushik Roy

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Open-Source Variable-Precision Floating-Point Library for Major Commercial FPGAs von Fang, Xin, Leeser, Miriam

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FINN- R: An End-to-End Deep-Learning Framework for Fast Exploration of Quantized Neural Networks von Blott, Michaela, Preußer, Thomas B., Fraser, Nicholas J., Gambardella, Giulio, O’brien, Kenneth, Umuroglu, Yaman, Leeser, Miriam, Vissers, Kees

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Strategies and Demonstration to Support Multiple Wireless Protocols with a Single RF Front-End von Mohamed, Mohamed, Handagala, Suranga, Xu, Jieming, Leeser, Miriam, Onabajo, Marvin

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High‐performance transformation of protein structure representation from internal to Cartesian coordinates von Bayati, Mahsa, Leeser, Miriam, Bardhan, Jaydeep P.

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XOR-FREE Implementation of Convolutional Encoder for Reconfigurable Hardware von Purohit, Gaurav, Chaubey, Vinod Kumar, Raju, Kota Solomon

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FPGAs in the Cloud von Leeser, Miriam, Handagala, Suranga, Zink, Michael, Kindratenko, Volodymyr, Elster, Anne

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Hardware Specification, Verification and Synthesis: Mathematical Aspects: Mathematical Sciences Institute Workshop Cornell University, Ithaca, New York, USA July 5–7, 1989 Proceedi... von Leeser, Miriam, Brown, Geoffrey

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A Scalable Unsegmented Multiport Memory for FPGA-Based Systems von Zambreno, Joseph, Jones, Phillip H., Attia, Osama G., Townsend, Kevin R.

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An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs von Asghar, Ali, Parvez, Husain

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Realizing Network-Attached FPGAs in the Cloud von Leeser, Miriam, Handagala, Suranga, Diaconu, Dana, Han, Zhaoyang, Zink, Michael, Elster, Anne, Alarcon, Sonia Lopez

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The Future of FPGA Acceleration in Datacenters and the Cloud von Bobda, Christophe, Mbongue, Joel Mandebi, Chow, Paul, Ewais, Mohammad, Tarafdar, Naif, Vega, Juan Camilo, Eguro, Ken, Koch, Dirk, Handagala, Suranga, Leeser, Miriam, Herbordt, Martin, Shahzad, Hafsah, Hofste, Peter, Ringlein, Burkhard, Szefer, Jakub, Sanaullah, Ahmed, Tessier, Russell

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QuTiBench: Benchmarking Neural Networks on Heterogeneous Hardware von Blott, Michaela, Halder, Lisa, Leeser, Miriam, Doyle, Linda

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