A 20‐Gb/s 4‐tap time‐domain DFE with pulse width modulation for a DQ‐DQS matched parallel receiver von Na, Daehoon, Choi, Woo‐Seok, Lee, Seon‐Kyoo

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A 21 fJ/Conversion-Step 100 kS/s 10-bit ADC With a Low-Noise Time-Domain Comparator for Low-Power Sensor Interface von LEE, Seon-Kyoo, PARK, Seung-Jin, PARK, Hong-June, SIM, Jae-Yoon

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A 1 GHz ADPLL With a 1.25 ps Minimum-Resolution Sub-Exponent TDC in 0.18 \mu m CMOS von LEE, Seon-Kyoo, SEO, Young-Hun, PARK, Hong-June, SIM, Jae-Yoon

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Current-Mode Transceiver for Silicon Interposer Channel von Lee, Seung-Hun, Lee, Seon-Kyoo, Kim, Byungsub, Park, Hong-June, Sim, Jae-Yoon

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A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation von Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim

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A 110 MHz to 1.4 GHz Locking 40-Phase All-Digital DLL von KIM, Young-Sang, LEE, Seon-Kyoo, PARK, Hong-June, SIM, Jae-Yoon

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A 95fJ/b current-mode transceiver for 10mm on-chip interconnect von Seon-Kyoo Lee, Seung-Hun Lee, Sylvester, D., Blaauw, D., Jae-Yoon Sim

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A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface von Lee, Seon-Kyoo, Kim, Byungsub, Park, Hong-June, Sim, Jae-Yoon

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Inactivation of S. mutans Using an Atmospheric Plasma Driven by a Palm-Size-Integrated Microwave Power Module von Park, S-J, Choi, J, Park, G Y, Lee, S-K, Cho, Y, Yun, J I, Jeon, S, Kim, K T, Lee, J K, Sim, J-Y

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A 1.8-Gb/s/Pin 16-Tb NAND Flash Memory Multi-Chip Package With F-Chip for High-Performance and High-Capacity Storage von Na, Daehoon, Lee, Jang-woo, Lee, Seon-Kyoo, Cho, Hwasuk, Lee, Junha, Yang, Manjae, Song, Eunjin, Kavala, Anil, Kim, Tongsung, Jang, Dong-Su, Jo, Youngmin, Shin, Ji-Yeon, Chun, Byung-Kwan, Lee, Tae-sung, Jeong, Byunghoon, Yoon, Chi-Weon, Kang, Dongku, Lee, Seungjae, Ihm, Jungdon, Byeon, Dae Seok, Lee, Jinyub, Song, Jai Hyuk

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A Wide Lock-Range Referenceless CDR with Automatic Frequency Acquisition von Sim, Jae-Yoon, Park, Hong-June, Kim, Young-Sang, Lee, Seon-Kyoo

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A 1-GHz Digital PLL With a 3-ps Resolution Floating-Point-Number TDC in a 0.18- \mu\hbox CMOS von Seo, Young-Hun, Lee, Seon-Kyoo, Sim, Jae-Yoon

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A 0.5V, 11.3-μW, 1-kS/s resistive sensor interface circuit with correlated double sampling von Hyunsoo Ha, Yunjae Suh, Seon-Kyoo Lee, Hong-June Park, Jae-Yoon Sim

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A 650Mb/s-to-8Gb/s referenceless CDR circuit with automatic acquisition of data rate von Seon-Kyoo Lee, Young-Sang Kim, Hyunsoo Ha, Younghun Seo, Hong-June Park, Jae-Yoon Sim

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A 5Gb/s single-ended parallel receiver with adaptive FEXT cancellation von Seon-Kyoo Lee, Hyunsoo Ha, Hong-June Park, Jae-Yoon Sim

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An 8GB/s quad-skew-cancelling parallel transceiver in 90nm CMOS for high-speed DRAM interface von Young-Sik Kim, Seon-Kyoo Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Bae Lee, Joo Sun Choi, Hong-June Park, Jae-Yoon Sim

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High-speed links for memory interface von Jae-Yoon Sim, Seon-Kyoo Lee, Young-Sik Kim, Young-Soo Sohn, Joo Sun Choi

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A SSN-Reduced 5Gb/s Parallel Transmitter von Lee, Seon-Kyoo, Kim, Young-Sang, Park, Hong-June, Sim, Jae-Yoon

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A 0.5-V, 1.47- \mu\hbox 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation von Ha, Hyunsoo, Lee, Seon-Kyoo, Kim, Byungsub, Park, Hong-June, Sim, Jae-Yoon

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A 8 GByte/s transceiver with current-balanced pseudo-differential signaling for memory interface von Seon-Kyoo Lee, Dong-Woo Jee, Yunjae Suh, Hong-June Park, Jae-Yoon Sim

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