Guest Editorial: Multi-Core Embedded Computing for Signal Processing von Lai, Shang-Hong, Lee, Jenq-Kuen, Kisacanin, Branislav

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Instruction scheduling methods and phase ordering framework for VLIW DSP processors with distributed register files von Wu, Chung-Ju, Lin, Yu-Te, Lee, Jenq-Kuen

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Case Study: Optimization Methods with TVM Hybrid-OP on RISC-V Packed SIMD von Yu, Meng-Shiun, Yuan, Chuan-Yue, Chen, Tai-Liang, Lee, Jenq-Kuen

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Case Study: Design Strategies for Enabling Visual Application Blocks of Bluetooth Library von Chen, Tai-Liang, Su, I-An, Lee, Jenq-Kuen

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PALF: compiler supports for irregular register files in clustered VLIW DSP processors von Lin, Yung-Chia, You, Yi-Ping, Lee, Jenq-Kuen

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Support of Probabilistic Pointer Analysis in the SSA Form von Ming-Yu Hung, Peng-Sheng Chen, Yuan-Shin Hwang, Ju, R. D., Jenq-Kuen Lee

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Accelerating AI performance with the incorporation of TVM and MediaTek NeuroPilot von Lee, Chao-Lin, Chung, Chun-Ping, Cheng, Sheng-Yuan, Lee, Jenq-Kuen, Lai, Robert

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Accelerating AI Applications with Sparse Matrix Compression in Halide von Lee, Chao-Lin, Chao, Chen-Ting, Chu, Wei-Hsu, Hung, Ming-Yu, Lee, Jenq-Kuen

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NNBlocks: a Blockly framework for AI computing von Chen, Tai-Liang, Chen, Yi-Ru, Yu, Meng-Shiun, Lee, Jenq-Kuen

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Experiment and enabled flow for GPGPU-Sim simulators with fixed-point instructions von Lee, Chao-Lin, Hsu, Min-Yih, Lu, Bing-Sung, Hung, Ming-Yu, Lee, Jenq-Kuen

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Compilers for leakage power reduction von You, Yi-Ping, Lee, Chingren, Lee, Jenq Kuen

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LC-GRFA: global register file assignment with local consciousness for VLIW DSP processors with non-uniform register files von Lu, Chia-Han, Lin, Yung-Chia, You, Yi-Ping, Lee, Jenq-Kuen

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Architecture and Compiler Support for GPUs Using Energy-Efficient Affine Register Files von Wang, Shao-Chung, Kan, Li-Chen, Lee, Chao-Lin, Hwang, Yuan-Shin, Lee, Jenq-Kuen

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Support OpenCL 2.0 Compiler on LLVM for PTX Simulators von Yang, Chun-Chieh, Wang, Shao-Chung, Hsu, Min-Yi, Chang, Yuan-Ming, Hwang, Yuan-Shin, Lee, Jenq-Kuen

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Compiler optimization on VLIW instruction scheduling for low power von Lee, Chingren, Lee, Jenq Kuen, Hwang, Tingting, Tsai, Shi-Chun

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TreeHouse: An MLIR-based Compilation Flow for Real-Time Tree-based Inference von Su, ChiaHui, Ku, Chia-Hua, Lee, Jenq Kuen, Chen, Kuan-Hsun

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C++ Support and Applications for Embedded Multicore DSP Systems von Kuan, Chi-Bang, Li, Jia-Jhe, Chen, Chung-Kai, Lee, Jenq-Kuen

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Support and optimization of Java RMI over a Bluetooth environment von Wei, Pu-Chen, Chen, Chung-Hsin, Chen, Cheng-Wei, Lee, Jenq-Kuen

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SIMD Everywhere Optimization from ARM NEON to RISC-V Vector Extensions von Li, Ju-Hung, Lin, Jhih-Kuan, Su, Yung-Cheng, Chu, Chi-Wei, Kuok, Lai-Tak, Lai, Hung-Ming, Lee, Chao-Lin, Lee, Jenq-Kuen

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Enabling an OpenCL Compiler for Embedded Multicore DSP Systems von Jia-Jhe Li, Chi-Bang Kuan, Tung-Yu Wu, Jenq Kuen Lee

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