8-ns CMOS 64 K4 and 256 K1 SRAMs von Flannagan, S.T., Pelley, P.H., Herr, N., Engles, B.E., Feng, T., Nogle, S.G., Eagan, J.W., Dunnigan, R.J., Day, L.J., Kung, R.I.

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A 21-ns 32 K/spl times/8 CMOS static RAM with a selectively pumped p-well array von Wang, K.L., Bader, M.D., Soorholtz, V.W., Mauntel, R.W., Mendez, H.J., Voss, P.H., Kung, R.I.

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A 21-ns 32 K×8 CMOS static RAM with a selectively pumped p-well array von Wang, K.L., Bader, M.D., Soorholtz, V.W., Mauntel, R.W., Mendez, H.J., Voss, P.H., Kung, R.I.

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Two-13 ns-64K CMOS SRAM's with very low active power and improved asynchronous circuit techniques von Flannagan, S.T., Reed, P.A., Voss, P.H., Nogle, S.G., Day, L.J., Sheng, D.Y., Barnes, J.J., Kung, R.I.

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An 8Kx8 dynamic RAM with self-refresh von Kung, R.I., Flannagan, S.T., Spitz, J.N.

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The design and performance of CMOS 256K bit DRAM devices von Mohsen, A., Kung, R.I., Simonsen, C.J., Schutz, J., Madland, P.D., Hamdy, E.Z., Bohr, M.T.

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