ADEPNET: A Dynamic-Precision Efficient Posit Multiplier for Neural Networks von Jonnalagadda, Aditya Anirudh, Kumar, Uppugunduru Anil, Thotli, Rishi, Sardesai, Satvik, Veeramachaneni, Sreehari, Ahmed, Syed Ershad

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Design and exploration of low-power SAD architectures using approximate compressors for Integer Motion Estimation von Anil Kumar, Uppugunduru, Guturu, Sahith, Ahmed, Syed Ershad

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Compressor based approximate multiplier architectures for media processing applications von Kumar, Uppugunduru Anil, Ahmed, Syed Ershad

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A Power-Efficient Gaussian Filter Architecture Using Adder Compressors for Edge Detection Application von Guturu, Sahith, Uppugunduru, Anil Kumar, Sharma, Apoorva, Ahmed, Syed Ershad

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Design methodology for highly accurate approximate multipliers for error resilient applications von Guturu, Sahith, Kumar, Uppugunduru Anil, Bharadwaj, S. Vignesh, Ahmed, Syed Ershad

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Compressor based hybrid approximate multiplier architectures with efficient error correction logic von Uppugunduru, Anil Kumar, Vignesh Bharadwaj, S., Ahmed, Syed Ershad

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Energy-Efficient Decoding and Encoding Hardware for Optimized Posit Arithmetic von Jonnalagadda, Aditya Anirudh, Thotli, Rishi, Veeramachaneni, Sreehari, Kumar, Uppugunduru Anil, Ahmed, Syed Ershad

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Power Efficient Approximate Multiplier for Neural Network Applications

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