A multi-core SoC design for advanced image and video compression von Dehnhardt, A., Kulaczewski, M.B., Friebe, L., Moch, S., Pirsch, P., Stolberg, H.-J., Reuter, C.

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An SoC with two multimedia DSPs and a RISC core for video compression applications von Stolberg, H.-J., Moch, S., Friebe, L., Dehnhardt, A., Kulaczewski, M.B., Berekovic, M., Pirsch, P.

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HiBRID-SoC: a multi-core system-on-chip architecture for multimedia signal processing applications von Stolberg, H.-J., Berekovic, M., Friebe, L., Moch, S., Flugel, S., Xun Mao, Kulaczewski, M.B., Klussmann, H., Pirsch, P.

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Implementations of a feature-based visual tracking algorithm on two MIMD machines von Kulaczewski, M.B., Siegel, H.J.

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Project management and verification-the key problems of student chip design courses von Jachalsky, J., Kulaczewski, M.B., Pirsch, P.

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CHIPDESIGN-a novel project-oriented microelectronics course von Kulaczewski, M.B., Zimmerman, S., Barke, E., Pirsch, P.

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HiBRID-SoC: a system-on-chip architecture with two multimedia DSPs and a RISC core von Friebe, L., Stolberg, H.-J., Berekovic, M., Moch, S., Kulaczewski, M.B., Dehnhardt, A., Pirsch, R.

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The PASM project: a study of reconfigurable parallel computing von Siegel, H.J., Braun, T.D., Dietz, H.G., Kulaczewski, M.B., Maheswaran, M., Pero, P., Siegel, J.M., So, J.J.E., Min Tan, Theys, M.D., Lee Wang

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HiBRID-SoC: a multi-core SoC architecture for multimedia signal processing von Stolberg, H.-J., Berekovic, M., Friebe, L., Moch, S., Kulaczewski, M.B., Dehnhardt, A., Pirsch, P.

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