Models and Metrics to Enable Energy-Efficiency Optimizations von Rivoire, S., Shah, M.A., Ranganatban, P., Kozyrakis, C., Meza, J.

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RAMP: Research Accelerator for Multiple Processors von Wawrzynek, J., Patterson, D., Oskin, M., Shin-Lien Lu, Kozyrakis, C., Hoe, J.C., Chiou, D., Asanovic, K.

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Vantage: scalable and efficient fine-grain cache partitioning von Sanchez, Daniel, Kozyrakis, Christos

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A case for intelligent RAM von Patterson, D., Anderson, T., Cardwell, N., Fromm, R., Keeton, K., Kozyrakis, C., Thomas, R., Yelick, K.

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The ZCache: Decoupling Ways and Associativity von Sanchez, D, Kozyrakis, C

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Evaluating MapReduce for Multi-core and Multiprocessor Systems von Ranger, C., Raghuraman, R., Penmetsa, A., Bradski, G., Kozyrakis, C.

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Architectural Semantics for Practical Transactional Memory von McDonald, Austen, Chung, JaeWoong, Carlstrom, Brian D., Minh, Chi Cao, Chafi, Hassan, Kozyrakis, Christos, Olukotun, Kunle

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Scalable, vector processors for embedded systems von Kozyrakis, C.E., Patterson, D.A.

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SCD: A scalable coherence directory with flexible sharer set encoding von Sanchez, D., Kozyrakis, C.

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Server Engineering Insights for Large-Scale Online Services von Kozyrakis, C, Kansal, A, Sankar, S, Vaid, K

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Vector vs. superscalar and VLIW architectures for embedded multimedia benchmarks von Kozyrakis, C., Patterson, D.

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Towards energy-proportional datacenter memory with mobile DRAM von Malladi, K. T., Nothaft, F. A., Periyathambi, K., Lee, B. C., Kozyrakis, C., Horowitz, M.

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Scalable and Efficient Fine-Grained Cache Partitioning with Vantage von Sanchez, D., Kozyrakis, C.

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Transactional Memory: The Hardware-Software Interface von McDonald, A., Carlstrom, B.D., Chung, J., Minh, C.C., Chafi, H., Kozyrakis, C., Olukotun, K.

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A new direction for computer architecture research von Kozyrakis, C.E., Patterson, D.A.

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Scalable processors in the billion-transistor era: IRAM von Kozyrakis, C.E., Perissakis, S., Patterson, D., Anderson, T., Asanovic, K., Cardwell, N., Fromm, R., Golbus, J., Gribstad, B., Keeton, K., Thomas, R., Treuhaft, N., Yelick, K.

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Hardware/compiler codevelopment for an embedded media processor von Kozyrakis, C., Judd, D., Gebis, J., Williams, S., Patterson, D., Yelick, K.

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Characterization of TCC on chip-multiprocessors von McDonald, A., JaeWoong Chung, Chafi, H., Chi Cao Minh, Carlstrom, B.D., Hammond, L., Kozyrakis, C., Olukotun, K.

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Heuristics for profile-driven method-level speculative parallelization von Whaley, J., Kozyrakis, C.

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The Netflix Challenge: Datacenter Edition von Delimitrou, C., Kozyrakis, C.

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