3.6 mw low power wireless RF receiver front end using creative current recycle technique von Damodara Venkata Appala Naidu, T., Madhavi, B. K., Lal Kishore, K.

Volltext

Electronic Measurements and Instrumentation von Kishore, K. Lal

Volltext

FPGA Implementation of 5G NR Primary and Secondary Synchronization von Ramesh Kumar, Aytha, Lal Kishore, K.

Volltext

Power Analysis and Optimization Techniques of an 8-bit FIR Filter from RTL through GDSII von Kumar, C Ashok, Madhavi, B K, Kishore, K Lal

Volltext

Enhanced Clock Gating Technique for Power Optimization in SRAM and Sequential Circuit von Ashok Kumar, Cheeli, Madhavi, B.K., Kishore, K. Lal

Volltext

Multiple Target Detection for High Resolution Doppler Radar von Moinuddin, Mohd Moazzam, Y, Mallikarjuna Reddy, A, Pasha I, Naveed, Syed A, K, Lal Kishore

Volltext

Mono-alphabetic Poly-semantic Sequence Design for HRR Target Detection von Moinuddin, Mohd. Moazzam, Reddy. Y, Mallikarjuna, I. A ., Pasha, K., Lal Kishore

Volltext

Low Leakage CNTFET SRAM Cells von Somineni, Rajendra Prasad, Madhavi, B.K., Kishore, K. Lal

Volltext

Design of a 32nm 7T SRAM Cell based on CNTFET for low power operation von Prasad, S. Rajendra, Madhavi, B. K., Kishore, K. Lal

Volltext bestellen

Dimensional Dependence of Voltage Coefficient of Resistance (αv) for PMNPT Based Varistors von Narasimham, K. V. N. S. V. P. L., Kishore, K. Lal

Volltext

Super Resolution Reconstruction in Mixed Noise Environment von Devi, A Geetha, Madhu, T, Kishore, K Lal

Volltext

A 80Ms/sec 10bit PIPELINED ADC Using 1.5Bit Stages And Built-in Digital Error Correction Logic von Rao, P Prasad, Kishore, K Lal

Volltext

Dynamic spectrum management scheme in a smart software radio von Rallapalli, H., Lal Kishore, K.

Volltext bestellen

A Technique to Reduce Glitch Power during Physical Design Stage for Low Power and Less IR Drop von KumarB.V.P, Vasantha, S. Murthy Sharma, N., Lal Kishore, K.

Volltext

Power optimized programmable embedded controller von Kamaraju, M, K Lal Kishore, Tilak, A V N

Volltext

Efficient Switching Activity Reduction Technique for Fault Tolerant Data Bus von Sathish, A, Latha, M Madhavi, Kishore, K Lal

Volltext

A Novel Approach to Reduce Leakage Power in GALS System architectures von Rajakumari, A, Murthy Sharma, N S, Kishore, K Lal

Volltext

Efficient Crosstalk Reduction Technique for Data Bus von Sathish, A, Latha, M Madhavi, Kishore, K Lal

Volltext

A technique to eliminate glitch power consumption at physical design stage in CMOS circuits von Kumar, Vasantha B. V. P., Sharma, N. S. Murthy, Kishore, K. Lal, Vivekanand, M., Raju, K. Murthy, Swetha, S. Divya

Volltext bestellen

Design of Low Write-Power Consumption SRAM Cell Based on CNTFET at 32nm Technology von Rajendra Prasad, S

Volltext