Review of Memory RAS for Data Centers von Lee, Jiseong, Kim, Min Joon, Kim, Woo-Seop, Kim, Yong Sin

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8 Gb 3-D DDR3 DRAM Using Through-Silicon-Via Technology von KANG, Uksong, CHUNG, Hoe-Ju, LEE, Jae-Wook, JOO, Han-Sung, KIM, Woo-Seop, DONG HYEON JANG, NAM SEOG KIM, CHOI, Jung-Hwan, CHUNG, Tae-Gyeong, YOO, Jei-Hwan, JOO SUN CHOI, KIM, Changhyun, HEO, Seongmoo, JUN, Young-Hyun, PARK, Duk-Ha, LEE, Hoon, JIN HO KIM, AHN, Soon-Hong, CHA, Soo-Ho, AHN, Jaesung, KWON, Dukmin

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A 31 ns Random Cycle VCAT-Based 4F ^ DRAM With Manufacturability and Enhanced Cell Efficiency von Song, Ki-Whan, Kim, Jin-Young, Yoon, Jae-Man, Kim, Sua, Kim, Huijung, Chung, Hyun-Woo, Kim, Hyungi, Kim, Kanguk, Park, Hwan-Wook, Kang, Hyun Chul, Tak, Nam-Kyun, Park, Dukha, Kim, Woo-Seop, Lee, Yeong-Taek, Oh, Yong Chul, Jin, Gyo-Young, Yoo, Jeihwan, Park, Donggun, Oh, Kyungseok, Kim, Changhyun, Jun, Young-Hyun

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BER Measurement of a 5.8-Gb/s/pin Unidirectional Differential I/O for DRAM Application With DIMM Channel von JANG, Young-Chan, CHUNG, Hoeju, LEE, Yun-Sang, KIM, Woo-Seop, LEE, Jung-Bae, YOO, Jeihwan, KIM, Changhyun, CHOI, Youngdon, PARK, Hwanwook, KIM, Jaekwan, LIM, Soouk, SUNWOO, Jung, PARK, Moon-Sook, KIM, Hyung-Seuk, KIM, Sang-Yun

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A 20-gb/s 256-mb DRAM with an inductorless quadrature PLL and a cascaded pre-emphasis transmitter von KIM, Kyu-Hyoun, SOHN, Young-Soo, KIM, Chan-Kyoung, PARK, Moonsook, LEE, Dong-Jin, KIM, Woo-Seop, KIM, Changhyun

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A 4-Gb/s/pin low-power memory I/O interface using 4-level simultaneous bi-directional signaling von KIM, Jin-Hyun, KIM, Sua, KIM, Woo-Seop, CHOI, Jung-Hwan, HWANG, Hong-Sun, KIM, Changhyun, KIM, Suki

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A 3.6-Gb/s point-to-point heterogeneous-voltage-capable DRAM interface for capacity-scalable memory subsystems von Kennedy, J., Mooney, R., Ellis, R., Jaussi, J., Borkar, S., Jung-Hwan Choi, Jae-Kwan Kim, Chan-Kyong Kim, Woo-Seop Kim, Chang-Hyun Kim, Soo-In Cho, Loeffler, S., Hoffmann, J., Hokenmaier, W., Houghton, R., Vogelsang, T.

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8Gb 3D DDR3 DRAM using through-silicon-via technology von Uksong Kang, Hoe-Ju Chung, Seongmoo Heo, Soon-Hong Ahn, Hoon Lee, Soo-Ho Cha, Jaesung Ahn, DukMin Kwon, Jin Ho Kim, Jae-Wook Lee, Han-Sung Joo, Woo-Seop Kim, Hyun-Kyung Kim, Eun-Mi Lee, So-Ra Kim, Keum-Hee Ma, Dong-Hyun Jang, Nam-Seog Kim, Man-Sik Choi, Sae-Jang Oh, Jung-Bae Lee, Tae-Kyung Jung, Jei-Hwan Yoo, Changhyun Kim

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An 8 Gb/s/pin 9.6 ns Row-Cycle 288 Mb Deca-Data Rate SDRAM With an I/O Error Detection Scheme von Kyu-hyoun Kim, Hoe-Ju Chung, Woo-Seop Kim, Moonsook Park, Jang, Y.-C., Jin-Young Kim, Hwan-Wook Park, Uksong Kang, Coteus, P.W., Joo Sun Choi, Changhyun Kim

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A two-layered cross-ply laminate model for a single-ply satin woven fabric composite under thermal loads von Lee, Jungwan, Kim, Woo-seop, Kim, Jung-soo, Um, Moon-kwang, Woo Kim, Sang, Woo Yi, Jin, Oh, Youngseok, Su Kim, Seong

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A 4-Gbps/pin transceiver with a multi-level simultaneous bi-directional scheme for serial link applications von Kim, Woo-Seop, Kim, Jin-Hyun, Kim, Chang-Hyun, Kim, Suki

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A control network architecture based on EIA-709.1 protocol for power line data communications von Kim, Woo-Seop, Kim, Lok-Won, Lee, Chang-Eun, Moon, Kyeong-Deok, Kim, Suki

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A 40nm 2Gb 7Gb/s/pin GDDR5 SDRAM with a programmable DQ ordering crosstalk equalizer and adjustable clock-tracking BW von Seung-Jun Bae, Young-Soo Sohn, Tae-Young Oh, Si-Hong Kim, Yun-Seok Yang, Dae-Hyun Kim, Sang-Hyup Kwak, Ho-Seok Seol, Chang-Ho Shin, Min-Sang Park, Gong-Heom Han, Byeong-Cheol Kim, Yong-Ki Cho, Hye-Ran Kim, Su-Yeon Doo, Young-Sik Kim, Dong-Seok Kang, Young-Ryeol Choi, Sam-Young Bang, Sun-Young Park, Yong-Jae Shin, Gil-Shin Moon, Cheol-Goo Park, Woo-Seop Kim, Hyang-Ja Yang, Jeong-Don Lim, Kwang-Il Park, Joo Sun Choi, Young-Hyun Jun

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A control protocol architecture based on LonTalk protocol for power line data communications von KIM, Woo-Seop, KIM, Lok-Won, LEE, Chang-Eun, MOON, Kyeong-Deok, SUKI KIM

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Recovery of cerium from glass polishing slurry von Kim, Jong-Young, Kim, Ung-Soo, Byeon, Myeong-Seop, Kang, Woo-Kyu, Hwang, Kwang-Teak, Cho, Woo-Seok

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BER Simulator Development for Link Compliance Analysis von Kang, Hyun-Chul, Kim, Woo-Seop, Lee, Jae-Wook, Jang, Young-Chan, Park, Hwan-Wook, Kim, Jong-Hoon, Lee, Jung-Bae, Kim, Chang-Hyun

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Channel BER Measurement for a 5.8Gb/s/pin unidirectional differential I/O for DRAM application von Hoeju Chung, Youngchan Jang, Youngdon Choi, Hwanwook Park, Jaekwan Kim, Soouk Lim, Jung Sunwoo, Moonsook Park, Hyungwsuk Kim, Sang-Yun Kim, Hyun-Kyung Kim, Su-Jin Chung, Eun-Mi Lee, Youngju Kim, Yun-Sang Lee, Woo-Seop Kim, Jung-Bae Lee, Changhyun Kim

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55 nm capacitor-less 1T DRAM cell transistor with non-overlap structure von Ki-Whan Song, Hoon Jeong, Jae-Wook Lee, Sung In Hong, Nam-Kyun Tak, Young-Tae Kim, Yong Lack Choi, Han Sung Joo, Sung Hwan Kim, Ho Ju Song, Yong Chul Oh, Woo-Seop Kim, Yeong-Taek Lee, Kyungseok Oh, Changhyun Kim

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A 6-Gbps/pin Half-Duplex LVDS I/O for High-Speed Mobile DRAM von Sua Kim, Bae-Sun Kong, Chil-gi Lee, Jin-Hyun Kim, Woo-Seop Kim, Young-Hyun Jun, Changhyun Kim

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The Current Status of Evaluation Technologies for the Function of Human Olfaction von Kim, Woo Seop, Jang, Dong Pyo, Kim, In Young

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