Digital Circuit Design Challenges and Opportunities in the Era of Nanoscale CMOS von Calhoun, Benton H., Cao, Yu, Li, Xin, Mai, Ken, Pileggi, Lawrence T., Rutenbar, Rob A., Shepard, Kenneth L.

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Threshold voltage distribution in MLC NAND flash memory: Characterization, analysis, and modeling von Cai, Yu, Haratsch, Erich F., Mutlu, Onur, Mai, Ken

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A High Reliability PUF Using Hot Carrier Injection Based Response Reinforcement von Bhargava, Mudit, Mai, Ken

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Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime von Yu Cai, Yalcin, G., Mutlu, O., Haratsch, E. F., Cristal, A., Unsal, O. S., Ken Mai

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Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs? von Chung, E S, Milder, P A, Hoe, J C, Mai, Ken

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Multi-bit Error Tolerant Caches Using Two-Dimensional Error Coding von Jangwoo Kim, Hardavellas, N., Ken Mai, Falsafi, B., Hoe, J.C.

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Highly Parallel FPGA Emulation for LDPC Error Floor Characterization in Perpendicular Magnetic Recording Channel von Yu Cai, Seungjune Jeon, Ken Mai, Kumar, B.V.K.V.

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Comparison of bi-stable and delay-based Physical Unclonable Functions from measurements in 65nm bulk CMOS von Bhargava, M., Cakir, C., Ken Mai

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6T SRAM and 3T DRAM data retention and remanence characterization in 65nm bulk CMOS von Cakir, C., Bhargava, M., Ken Mai

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Error patterns in MLC NAND flash memory: measurement, characterization, and analysis von Cai, Yu, Haratsch, Erich F., Mutlu, Onur, Mai, Ken

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SCAN-PUF: A low overhead Physically Unclonable Function from scan chain power-up states von Niewenhuis, Ben, Blanton, R. D., Bhargava, Mudit, Ken Mai

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In-Situ Observation of Circuit Behavior Using Pump-Probe Laser Voltage Probe Technique von King, M. P., Beutler, J., Smith, N., Kohl, I., Meisenheimer, T., Atli, A. O., Mohan, P., Mai, K.

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Evaluating the Impact of Repetition, Redundancy, Scrubbing, and Partitioning on 28-nm FPGA Reliability Through Neutron Testing von Kibar, Ogun O., Mohan, Prashanth, Rech, Paolo, Mai, Ken

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Mismatch analysis and statistical design at 65 nm and below von Pileggi, L., Keskin, G., Xin Li, Ken Mai, Proesel, J.

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Virtual prototyper (ViPro): An early design space exploration and optimization tool for SRAM designers von Nalam, Satyanand, Bhargava, Mudit, Ken Mai, Calhoun, Benton H

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Secure hardware-entangled field programmable gate arrays von Erbagci, Burak, Akkaya, Nail Etkin Can, Bhargava, Mudit, Dondero, Rachel, Mai, Ken

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Architecture and circuit techniques for a 1.1-GHz 16-kb reconfigurable memory in 0.18-μm CMOS von KEN MAI, RON HO, ALON, Elad, DEAN LIU, KIM, Younggon, PATIL, Dinesh, HOROWITZ, Mark A

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Variation-tolerant SRAM sense-amplifier timing using configurable replica bitlines von Arslan, U., McCartney, M.P., Bhargava, M., Xin Li, Ken Mai, Pileggi, L.T.

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Cetuximab and panitumumab in a patient with colon cancer and concomitant chronic skin disease:A potential beneficial effect on psoriasis vulgaris von Okamoto, Ken, Maeda, Hiromichi, Shiga, Takeo, Shiga, Mai, Dabanaka, Ken, Hanazaki, Kazuhiro, Kobayashi, Michiya

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Guest Editorial Special Section on Hardware Security and Trust von Karri, Ramesh, Koushanfar, Farinaz, Sinanoglu, Ozgur, Makris, Yiorgos, Mai, Ken, Sadeghi, Ahmad Reza, Bhunia, Swarup

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