Low latency network and distributed storage for next generation HPC systems: the ExaNeSt project von Ammendola, R, Biagioni, A, Cretaro, P, Frezza, O, Lo Cicero, F, Lonardo, A, Martinelli, M, Paolucci, P S, Pastorelli, E, Pisani, F, Simula, F, Vicini, P, Navaridas, J, Chaix, F, Chrysos, N, Katevenis, M, Papaeustathiou, V

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Weighted round-robin cell multiplexing in a general-purpose ATM switch chip von Katevenis, M., Sidiropoulos, S., Courcoubetis, C.

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Crossbar NoCs Are Scalable Beyond 100 Nodes von Passas, G., Katevenis, M., Pnevmatikatos, D.

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LP-NUCA: Networks-in-Cache for High-Performance Low-Power Embedded Processors von Gracia, D. S., Dimitrakopoulos, G., Arnal, T. M., Katevenis, M. G. H., Yufera, V. V.

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Variable-size multipacket segments in buffered crossbar (CICQ) architectures von Katevenis, M., Passas, G.

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Architecture Enhancements for the ADRES Coarse-Grained Reconfigurable Array von Bouwens, Frank, Berekovic, Mladen, De Sutter, Bjorn, Gaydadjiev, Georgi

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Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics von Chrysos, N., Katevenis, M.

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MLP-Aware Dynamic Cache Partitioning von Moreto, Miquel, Cazorla, Francisco J., Ramirez, Alex, Valero, Mateo

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ATLAS I: implementing a single-chip ATM switch with backpressure von Kornaros, G., Pnevmatikatos, D., Vatsolaki, P., Kalokerinos, G., Xanthaki, C., Mavroidis, D., Serpanos, D., Katevenis, M.

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Modeling Multigrain Parallelism on Heterogeneous Multi-core Processors: A Case Study of the Cell BE von Blagojevic, Filip, Feng, Xizhou, Cameron, Kirk W., Nikolopoulos, Dimitrios S.

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Compiler Techniques for Reducing Data Cache Miss Rate on a Multithreaded Architecture von Sarkar, Subhradyuti, Tullsen, Dean M.

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Complementing Missing and Inaccurate Profiling Using a Minimum Cost Circulation Algorithm von Levin, Roy, Newman, Ilan, Haber, Gadi

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An efficient sequential iterative matching algorithm for CIOQ switches von Yanping Gao, Kachris, C., Katevenis, M.

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rMPI: Message Passing on Multicore Processors with On-Chip Interconnect von Psota, James, Agarwal, Anant

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COFFEE: COmpiler Framework for Energy-Aware Exploration von Raghavan, Praveen, Lambrechts, Andy, Absar, Javed, Jayapala, Murali, Catthoor, Francky, Verkest, Diederik

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Experiences with Parallelizing a Bio-informatics Program on the Cell BE von Vandierendonck, Hans, Rul, Sean, Questier, Michiel, De Bosschere, Koen

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Using Dynamic Binary Instrumentation to Generate Multi- platform SimPoints: Methodology and Accuracy von Weaver, Vincent M., McKee, Sally A.

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Weighted fairness in buffered crossbar scheduling von Chrysos, N., Katevenis, M.

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Web-conscious storage management for Web proxies von Markatos, E.P., Pnevmatikatos, D.N., Flouris, M.D., Katevenis, M.G.H.

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Drug Design Issues on the Cell BE von Servat, Harald, González-Alvarez, Cecilia, Aguilar, Xavier, Cabrera-Benitez, Daniel, Jiménez-González, Daniel

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