Overview of the architecture, circuit design, and physical implementation of a first-generation cell processor von Pham, D.C., Aipperspach, T., Boerstler, D., Bolliger, M., Chaudhry, R., Cox, D., Harvey, P., Harvey, P.M., Hofstee, H.P., Johns, C., Kahle, J., Kameyama, A., Keaty, J., Masubuchi, Y., Pham, M., Pille, J., Posluszny, S., Riley, M., Stasiak, D.L., Suzuoki, M., Takahashi, O., Warnock, J., Weitzel, S., Wendel, D., Yazawa, K.

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POWER7™, a Highly Parallel, Scalable Multi-Core High End Server Processor von Wendel, D F, Kalla, R, Warnock, J, Cargnoni, R, Chu, S G, Clabes, J G, Dreps, D, Hrusecky, D, Friedrich, J, Islam, S, Kahle, J, Leenstra, J, Mittal, G, Paredes, J, Pille, J, Restle, P J, Sinharoy, B, Smith, G, Starke, W J, Taylor, S, Van Norstrand, J, Weitzel, S, Williams, P G, Zyuban, V

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The Cell Processor Architecture von Kahle, Jim

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A 2.2 W, 80 MHz superscalar RISC microprocessor von Gerosa, G., Gary, S., Dietz, C., Dac Pham, Hoover, K., Alvarez, J., Sanchez, H., Ippolito, P., Tai Ngo, Litch, S., Eno, J., Golab, J., Vanderschaaf, N., Kahle, J.

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A 1.2 W 66 MHz superscalar RISC microprocessor for set-tops, video games, and PDAs von Dac Pham, Kahle, J., Ogden, D., Putrino, M., Tai Ngo, Hoover, K., Cang Tran, Sweet, M., Hung Hua, Quan Nguyen, Mallick, S., Eisen, L., Loper, A., Chitturi, R., Lyon, T., Ho, B., Patel, R., Cheesebrough, E., Kuttanna, B., Piejko, A.

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Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor von Pham, Dac, Anderson, Hans-Werner, Behnen, Erwin, Bolliger, Mark, Gupta, Sanjay, Hofstee, Peter, Harvey, Paul, Johns, Charles, Kahle, Jim, Kameyama, Atsushi, Keaty, John, Le, Bob, Lee, Sang, Nguyen, Tuyen, Petrovick, John, Pham, Mydung, Pille, Juergen, Posluszny, Stephen, Riley, Mack, Verock, Joseph, Warnock, James, Weitzel, Steve, Wendel, Dieter

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Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor von Pham, D., Anderson, H.W., Behnen, E., Bolliger, M., Gupta, S., Hofstee, P., Harvey, P., Johns, C., Kahle, J., Kameyama, A., Keaty, J., Le, B., Sang Lee, Tuyen Nguyen, Petrovick, J., Mydung Pham Pille, J., Posluszny, S., Riley, M., Verock, J., Warnock, J., Weitzel, S., Wendel, D.

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Method system and apparatus for instruction execution tracing with out of order processors von STARKE WILLIAM J, KAHLE JIM A, LOGAN DOUGLAS R, DALE JASON N, VITALE PHILIP L, MERICAS ALEX E

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Method system and apparatus for instruction execution tracing with out of order processors von Dale, Jason N, Kahle, Jim A, Logan, Douglas R, Mericas, Alex E, Starke, William J, Vitale, Philip L

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The practical value of health management in space exploration systems von Kahle, W., Miller, J.

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