Floor Planning of 3D IC Design Using Hybrid Multi-verse Optimizer von Pothiraj, Sivakumar, Kadambarajan, Jeya Prakash, Kadarkarai, Pandiaraj

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10GB MAC CORE verification – Oversized packet testcase module von Kadarkarai, Pandiaraj, Kaja, Ganesh, Reddy, Sura Chandra Kiran, Nali, Venkata Rao, Velikanti, Kiran Kumar

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10GB MAC CORE verification – Missing EOP ethernet test von Kadarkarai, Pandiaraj, Dasari, Naga Revanth Kumar, Chowdary, Mohith, Sarangam, Meka Sathwik, Enjeti, Praveen Teja, Muthusamy, Ramesh

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Thermal and congestion aware algorithm for 3D integrated circuits von Kadarkarai, Pandiaraj, Pothiraj, Sivakumar

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Garbage monitoring system using GSM von Kadarkarai, Pandiaraj, Pothiraj, Sivakumar, Venkatesakumaran, Nandhini, Seenivasan, Parkavi

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