Toward Practical-Scale Quantum Annealing Machine for Prime Factoring von Maezawa, Masaaki, Fujii, Go, Hidaka, Mutsuo, Imafuku, Kentaro, Kikuchi, Katsuya, Koike, Hanpei, Makise, Kazumasa, Nagasawa, Shuichi, Nakagawa, Hiroshi, Ukibe, Masahiro, Kawabata, Shiro

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Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology von HIOKI, Masakazu, KOIKE, Hanpei

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Development of an Evaluation Platform and Performance Experimentation of Flex Power FPGA Device von KATASHITA, Toshihiro, HIOKI, Masakazu, HORI, Yohei, KOIKE, Hanpei

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Implementation of pseudo-linear feedback shift register-based physical unclonable functions on silicon and sufficient Challenge–Response pair acquisition using Built-In Self-Test b... von Ogasahara, Yasuhiro, Hori, Yohei, Katashita, Toshihiro, Iizuka, Tomoki, Awano, Hiromitsu, Ikeda, Makoto, Koike, Hanpei

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Compact model of ferroelectric-gate field-effect transistor for circuit simulation based on multidomain Landau-Kalathnikov theory von Asai, Hidehiro, Fukuda, Koichi, Hattori, Junichi, Koike, Hanpei, Miyata, Noriyuki, Takahashi, Mitsue, Sakai, Shigeki

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Design Optimization of FinFET Domino Logic Considering the Width Quantization Property von Rasouli, S H, Dadgour, H F, Endo, K, Koike, H, Banerjee, K

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A Cryogenic CMOS Current Integrator and Correlation Double Sampling Circuit for Spin Qubit Readout von Fuketa, Hiroshi, Akita, Ippei, Ishikawa, Tomohiro, Koike, Hanpei, Mori, Takahiro

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Low Overhead Design of Power Reconfigurable FPGA with Fine-Grained Body Biasing on 65-nm SOTB CMOS Technology von Hioki, Masakazu, Koike, Hanpei

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Impact of Low-Variability SOTB Process on Ultra-Low-Voltage Operation of 1 Million Logic Gates von Ogasahara, Yasuhiro, Nakagawa, Tadashi, Sekigawa, Toshihiro, Tsutsumi, Toshiyuki, Koike, Hanpei

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SOTB Implementation of a Field Programmable Gate Array with Fine-Grained Vt Programmability von Hioki, Masakazu, Ma, Chao, Kawanami, Takashi, Ogasahara, Yasuhiro, Nakagawa, Tadashi, Sekigawa, Toshihiro, Tsutsumi, Toshiyuki, Koike, Hanpei

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1/f$ Noise Characteristics of Fin-Type Field-Effect Transistors in Saturation Region von Sakai, Hideo, O'uchi, Shin-ichi, Endo, Kazuhiko, Matsukawa, Takashi, Liu, Yongxun, Ishikawa, Yuki, Tsukada, Junichi, Nakagawa, Tadashi, Sekigawa, Toshihiro, Koike, Hanpei, Masahara, Meishoku, Ishikuro, Hiroki

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High-Frequency Precise Characterization of Intrinsic FinFET Channel von SAKAI, Hideo, O'UCHI, Shinichi, MATSUKAWA, Takashi, ENDO, Kazuhiko, LIU, Yongxun, TSUKADA, Junichi, ISHIKAWA, Yuki, NAKAGAWA, Tadashi, SEKIGAWA, Toshihiro, KOIKE, Hanpei, SAKAMOTO, Kunihiro, MASAHARA, Meishoku, ISHIKURO, Hiroki

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A 0.7-V Opamp in Scaled Low-Standby-Power FinFET Technology von O'UCHI, Shin-ichi, ENDO, Kazuhiko, MATSUKAWA, Takashi, LIU, Yongxun, NAKAGAWA, Tadashi, ISHIKAWA, Yuki, TSUKADA, Junichi, YAMAUCHI, Hiromi, SEKIGAWA, Toshihiro, KOIKE, Hanpei, SAKAMOTO, Kunihiro, MASAHARA, Meishoku

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Suppression of Intrinsic Delay Variation in FPGAs using Multiple Configurations von Matsumoto, Yohei, Hioki, Masakazu, Kawanami, Takashi, Koike, Hanpei, Tsutsumi, Toshiyuki, Nakagawa, Tadashi, Sekigawa, Toshihiro

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FinFET-Based Flex-Vth SRAM Design for Drastic Standby-Leakage-Current Reduction von O'UCHI, Shin-ichi, MASAHARA, Meishoku, ENDO, Kazuhiko, LIU, Yongxun, MATSUKAWA, Takashi, SAKAMOTO, Kunihiro, SEKIGAWA, Toshihiro, KOIKE, Hanpei, SUZUKI, Eiichi

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Static noise margin enhancement by flex-pass-gate SRAM von O'uchi, Shin-Ichi, Masahara, Meishoku, Sakamoto, Kunihiro, Endo, Kazuhiko, Liu, Yungxun, Matsukawa, Takashi, Sekigawa, Toshihiro, Koike, Hanpei, Suzuki, Eiichi

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Optimum Gate Workfunction for V-Controllable Four-Terminal-Driven Double-Gate MOSFETs (4T-XMOSFETs)-Band-Edge Workfunction Versus Midgap Workfunction von Masahara, M., O'uchi, S., Yongxun Liu, Sakamoto, K., Endo, K., Matsukawa, T., Sekigawa, T., Koike, H., Suzuki, E.

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Demonstration, analysis, and device design considerations for independent DG MOSFETs von Masahara, M., Yongxun Liu, Sakamoto, K., Endo, K., Matsukawa, T., Ishii, K., Sekigawa, T., Yamauchi, H., Tanoue, H., Kanemaru, S., Koike, H., Suzuki, E.

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The Performance and Density Advantages of 3D FPGA von Nakagawa, Yaoko, Osada, Kenichi, Matsumura, Tadayuki, Koike, Hanpei, Miyamoto, Naoto, Takeda, Kenichi

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Metal-Gate FinFET Variation Analysis by Measurement and Compact Model von O'uchi, S.-i., Matsukawa, T., Nakagawa, T., Endo, K., Yongxun Liu, Sekigawa, T., Tsukada, J., Ishikawa, Y., Yamauchi, H., Ishii, K., Suzuki, E., Koike, H., Sakamoto, K., Masahara, M.

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