Promising storage capacitor structures with thin Ta2O5 film for low-power high-density DRAM's von SHINRIKI, H, KISU, T, KIMURA, S.-I, NISHIOKA, Y, KAWAMOTO, Y, MUKAI, K

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An experimental 1.5-V 64-Mb DRAM von Nakagome, Y., Tanaka, H., Takeuchi, K., Kume, E., Watanabe, Y., Kaga, T., Kawamoto, Y., Murai, F., Izawa, R., Hisamoto, D., Kisu, T., Nishida, T., Takeda, E., Itoh, K.

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Phase-state low electron-number drive random access memory (PLEDM) von Nakazato, K., Itoh, K., Ahmed, H., Mizuta, H., Kisu, T., Kato, M., Sakata, T.

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256-Mb DRAM circuit technologies for file applications von Kitsukawa, G., Horiguchi, M., Kawajiri, Y., Kawahara, T., Akiba, T., Kawase, Y., Tachibana, T., Sakai, T., Aoki, M., Shukuri, S., Sagara, K., Nagai, R., Ohji, Y., Hasegawa, N., Yokoyama, N., Kisu, T., Yamashita, H., Kure, T., Nishida, T.

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Crown-shaped stacked-capacitor cell for 1.5-V operation 64-Mb DRAMs von Kaga, T., Kure, T., Shinriki, H., Kawamoto, Y., Murai, F., Nishida, T., Nakagome, Y., Hisamoto, D., Kisu, T., Takeda, E., Itoh, K.

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Circuit techniques for 1.5-3.6-V battery-operated 64-Mb DRAM von Nakagome, Y., Itoh, K., Takeuchi, K., Kume, E., Tanaka, H., Isoda, M., Musha, T., Kaga, T., Kisu, T., Nishida, T., Kawamoto, Y., Aoki, M.

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Method of manufacturing semiconductor memory device and semiconductor memory device von Kisu, Teruaki, Nakazato, Kazuo, Takahashi, Masahito

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Method of manufacturing semiconductor memory device and semiconductor memory device von TAKAHASHI MASAHITO, NAKAZATO KAZUO, KISU TERUAKI

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Method of manufacturing semiconductor memory device and semiconductor memory device von KISU HARUKO, TAKAHASHI MASAHITO, NAKAZATO KAZUO, KISU TERUAKI, KISU TERUO

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Method of manufacturing semiconductor memory device and semiconductor memory device von Kisu, Teruo, Kisu, Teruaki, Kisu, Haruko, Nakazato, Kazuo, Takahashi, Masahito

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A diagonal active-area stacked capacitor DRAM cell with storage capacitor on bit line von Kimura, S., Kawamoto, Y., Kure, T., Hasegawa, N., Kisu, T., Etoh, J., Aoki, M., Takeda, E., Sunami, H., Itoh, K.

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Semiconductor memory device with MIS transistors von Kisu, Teruaki, Nakazato, Kazuo, Takahashi, Masahito

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Semiconductor memory device with MIS transistors von TAKAHASHI MASAHITO, NAKAZATO KAZUO, KISU TERUAKI

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Method of manufacturing semiconductor memory device and semiconductor memory device von TAKAHASHI MASAHITO, KISU HARUKO, NAKAZATO KAZUO, KISU TERUAKI, KISU TERUO

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Method of manufacturing semiconductor memory device and semiconductor memory device von Nakazato, Kazuo, Kisu, Teruaki, Takahashi, Masahito, Kisu, Teruo, Kisu, Haruko

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SEMICONDUCTOR STORAGE DEVICE AND METHOD OF MANUFACTURING THE SAME von TAKAHASHI MASATO, NAKAZATO KAZUO, KISU TERUAKI

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METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE von KUJIRAI YUTAKA, TABATA TAKESHI, MATSUOKA HIDEYUKI, NAKAZATO KAZUO, KISU TERUAKI, HAGA SATORU, SHIGENIWA MASAHIRO

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Vertical misfet manufacturing method, vertical misfet, semiconductor memory device manufacturing method, and semiconductor memory device von KISU HARUKO, MATSUOKA HIDEYUKI, NAKAZATO KAZUO, TABATA TSUYOSHI, KUJIRAI HIROSHI, KISU TERUAKI, MONIWA MASAHIRO, HAGA SATORU, KISU TERUO

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Longitudinal misfet manufacturing method, Longitudinal misfet, semiconductor storage device manufacturing method, and semiconductor storage device von KISU HARUKO, MATSUOKA HIDEYUKI, NAKAZATO KAZUO, TABATA TSUYOSHI, KUJIRAI HIROSHI, KISU TERUAKI, MONIWA MASAHIRO, HAGA SATORU, KISU TERUO

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SEMICONDUCTOR MEMORY von MURANAKA MASAYA, HASHIMOTO TAKESHI, ITO YUTAKA, NAKAZATO KAZUO, KISU TERUAKI

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