Monolithic Silicon Integration of Scaled Photonic Switch Fabrics, CMOS Logic, and Device Driver Circuits von Lee, Benjamin G., Rylyakov, Alexander V., Green, William M. J., Assefa, Solomon, Baks, Christian W., Rimolo-Donadio, Renato, Kuchta, Daniel M., Khater, Marwan H., Barwicz, Tymon, Reinholm, Carol, Kiewra, Edward, Shank, Steven M., Schow, Clint L., Vlasov, Yurii A.

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Dopant-Segregation Technique for Leakage Reduction and Performance Improvement in Trigate Transistors Without Raised Source/Drain Epitaxy von Fei Liu, Zhen Zhang, Khater, Marwan H., Yu Zhu, Koswatta, Siyuranga O., Chang, Josephine, Gonsalves, Jemima, Price, William, Engelmann, Sebastian U., Guillorn, Michael A.

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A Novel Approach to Photonic Packaging Leveraging Existing High-Throughput Microelectronic Facilities von Barwicz, Tymon, Taira, Yoichi, Lichoulas, Ted W., Boyer, Nicolas, Martin, Yves, Numata, Hidetoshi, Jae-Woong Nah, Takenobu, Shotaro, Janta-Polczynski, Alexander, Kimbrell, Eddie L., Leidy, Robert, Khater, Marwan H., Kamlapurkar, Swetha, Engelmann, Sebastian, Vlasov, Yurii A., Fortier, Paul

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Half-terahertz operation of SiGe HBTs von Krithivasan, R., Yuan Lu, Cressler, J.D., Jae-Sung Rieh, Khater, M.H., Ahlgren, D., Freeman, G.

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On the Performance Limits of Cryogenically Operated SiGe HBTs and Its Relation to Scaling for Terahertz Speeds von Jiahui Yuan, Cressler, J.D., Krithivasan, R., Thrivikraman, T., Khater, M.H., Ahlgren, D.C., Joseph, A.J., Jae-Sung Rieh

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High- \kappa/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length von Khater, M.H., Zhen Zhang, Jin Cai, Lavoie, C., D'Emic, C., Qingyun Yang, Bin Yang, Guillorn, M., Klaus, D., Ott, J.A., Yu Zhu, Ying Zhang, Changhwan Choi, Frank, M.M., Kam-Leung Lee, Narayanan, V., Dae-Gyu Park, Qiqing Ouyang, Haensch, W.

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High-k/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length von KHATER, Marwan H, ZHEN ZHANG, YU ZHU, YING ZHANG, CHOI, Changhwan, FRANK, Martin M, LEE, Kam-Leung, NARAYANAN, Vijay, PARK, Dae-Gyu, QIQING OUYANG, HAENSCH, Wilfried, JIN CAI, LAVOIE, Christian, D'EMIC, Christopher, QINGYUN YANG, BIN YANG, GUILLORN, Michael, KLAUS, David, OTT, John A

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Chlorine plasma and polysilicon etch characterization in an inductively coupled plasma etch reactor von Khater, Marwan H, Overzet, Lawrence J

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A new inductively coupled plasma source design with improved azimuthal symmetry control von Khater, Marwan H, Overzet, Lawrence J

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Demonstration of a High Extinction Ratio Monolithic CMOS Integrated Nanophotonic Transmitter and 16 Gb/s Optical Link von Gill, Douglas M., Proesel, Jonathan E., Chi Xiong, Orcutt, Jason S., Rosenberg, Jessie C., Khater, Marwan H., Barwicz, Tymon, Assefa, Solomon, Shank, Steven M., Reinholm, Carol, Ellis-Monaghan, John, Kiewra, Edward, Kamlapurkar, Swetha, Breslin, Chris M., Green, William M. J., Haensch, Wilfried, Vlasov, Yurii A.

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Stabilizing inductively coupled plasma source impedance and plasma uniformity using a Faraday shield von Khater, Marwan H., Overzet, Lawrence J.

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Pushing the Performance Limits of SiGe HBT Technology von Khater, Marwan H., Adam, Thomas, Rieh, Jae-Sung, Schonenberg, Kathryn, Pagette, Francois, Stein, Kenneth, Jeng, Shwu-Jen, Ahlgren, David, Freeman, Gregory

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SiGe HBTs in 90nm BiCMOS Technology Demonstrating fT/fMAX 285GHz/475GHz through Simultaneous Reduction of Base Resistance and Extrinsic Collector Capacitance von Liu, Qizhi Z., Adkisson, James W., Jain, Vibhor, Camillo-Castillo, Renata A., Khater, Marwan H., Gray, Peter B., Pekarik, John Jack, Zetterlund, Bjorn, Divergilio, Adam W., Kerbaugh, Michael L., Harame, D. L.

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SiGe HBTs in 90nm BiCMOS Technology Demonstrating f T /f MAX 285GHz/475GHz through Simultaneous Reduction of Base Resistance and Extrinsic Collector Capacitance von Liu, Qizhi Z., Adkisson, James W., Jain, Vibhor, Camillo-Castillo, Renata A., Khater, Marwan H., Gray, Peter B., Pekarik, John Jack, Zetterlund, Bjorn, Divergilio, Adam W., Kerbaugh, Michael L., Harame, D. L.

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A Novel Approach to Isolating the Edge of the Shallow Trench Isolation in SiGe HBTs for Improved Device Performance von Camillo-Castillo, Renata A., Liu, Qizhi Z., Jain, Vibhor, Adkisson, James W., Khater, Marwan H., Gray, Peter, Pekarik, John Jack, Malladi, R, Harame, D. L.

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High-[Formula Omitted]/Metal-Gate Fully Depleted SOI CMOS With Single-Silicide Schottky Source/Drain With Sub-30-nm Gate Length von Khater, Marwan H, Zhang, Zhen, Cai, Jin, Lavoie, Christian, D'Emic, Christopher, Yang, Qingyun, Yang, Bin, Guillorn, Michael, Klaus, David, Ott, John A, Zhu, Yu, Zhang, Ying, Choi, Changhwan, Frank, Martin M, Lee, Kam-Leung, Narayanan, Vijay, Park, Dae-Gyu, Ouyang, Qiqing, Haensch, Wilfried

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Co-integration of high-performance and high-breakdown SiGe HBTs in a BiCMOS technology von Pekarik, John J., Adkisson, James W., Camillo-Castillo, Renata, Cheng, Peng, DiVergilio, Adam W., Gray, Peter B., Jain, Vibhor, Kaushal, Vikas, Khater, Marwan H., Liu, Qizhi, Harame, David L.

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On the Frequency Limits of SiGe HBTs for TeraHertz Applications von Jiahui Yuan, Krithivasan, R., Cressler, J.D., Khater, M.H., Ahlgren, D.C., Joseph, A.J.

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Comparison of negative-ion and positive-ion-assisted etching of silicon von Kanakasabapathy, Sivananda K., Khater, Marwan H., Overzet, Lawrence J.

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Multivalent oxide cap for analog switching resistive memory von Khater, Marwan H, Kim, Seyoung, Ando, Takashi, Miyazoe, Hiroyuki

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