Capacitive micromachined ultrasonic transducers: next-generation arrays for acoustic imaging? von Oralkan, O., Ergun, A.S., Johnson, J.A., Karaman, M., Demirci, U., Kaviani, K., Lee, T.H., Khuri-Yakub, B.T.

Volltext

A 6.4-Gb/s Near-Ground Single-Ended Transceiver for Dual-Rank DIMM Memory Interface Systems von Bucher, Michael, Kollipara, Ravi T., Su, Bruce, Gopalakrishnan, Liji, Prabhu, Kashinath, Venkatesan, Pravin Kumar, Kaviani, Kambiz, Daly, Barry, Stonecypher, B. William F., Dettloff, Wayne, Stone, Teva, Heaton, Fred, Yi Lu, Madden, Chris, Bangalore, Sanath, Eble, John C., Nguyen, Nhat M., Lei Luo

Volltext

A 4.1-pJ/b, 16-Gb/s Coded Differential Bidirectional Parallel Electrical Link von Amirkhany, A., Kaviani, K., Abbasfar, A., Fazeel, S., Beyene, W., Hoshino, C., Madden, C., Chang, K., Yuan, C.

Volltext

A 16 Gb/s/Link, 64 GB/s Bidirectional Asymmetric Memory Interface von Haechang Lee, Kun-Yung Ken Chang, Jung-Hoon Chun, Ting Wu, Frans, Y., Leibowitz, B., Nhat Nguyen, Chin, T.J., Kaviani, K., Shen, J., Xudong Shi, Beyene, W.T., Li, S., Navid, R., Aleksic, M., Lee, F.S., Quan, F., Zerbe, J., Perego, R., Assaderaghi, F.

Volltext

A 0.4-mW/Gb/s Near-Ground Receiver Front-End With Replica Transconductance Termination Calibration for a 16-Gb/s Source-Series Terminated Transceiver von Kaviani, K., Amirkhany, A., Huang, C., Phuong Le, Beyene, W. T., Madden, C., Saito, K., Sano, K., Murugan, V. I., Kun-Yung Ken Chang, Yuan, X. C.

Volltext

A 0.94mW/Gb/s 22Gb/s 2-tap partial-response DFE receiver in 40nm LP CMOS von Kwangmo Jung, Amirkhany, A., Kaviani, K.

Volltext

A Tri-Modal 20-Gbps/Link Differential/DDR3/GDDR5 Memory Interface von Kaviani, K., Ting Wu, Wei, J., Amirkhany, A., Jie Shen, Chin, T. J., Thakkar, C., Beyene, W. T., Chan, N., Chen, C., Bing Ren Chuang, Dressler, D., Gadde, V. P., Hekmat, M., Ho, E., Huang, C., Phuong Le, Mahabaleshwara, Madden, C., Mishra, N. K., Raghavan, L., Saito, K., Schmitt, R., Secker, D., Xudong Shi, Fazeel, S., Srinivas, G. S., Zhang, S., Tran, C., Vaidyanath, A., Vyas, K., Jain, M., Kun-Yung Ken Chang, Xingchao Yuan

Volltext

A 12.8-Gb/s/link Tri-Modal Single-Ended Memory Interface von Amirkhany, Amir, Wei, Jason, Mishra, Navin Kumar, Jie Shen, Beyene, Wendemagegnehu T., Chen, Catherine, Chin, T. J., Dressier, Deborah, Huang, Charlie, Gadde, Vijay P., Hekmat, Mohammad, Kaviani, Kambiz, Hai Lan, Phuong Le, Mahabaleshwara, Madden, Chris, Mukherjee, Sanku, Raghavan, Leneesh, Saito, Keisuke, Secker, Dave, Sendhil, Arul, Schmitt, Ralf, Fazeel, Shuaeb, Srinivas, Gundlapalli Shanmukha, Ting Wu, Chanh Tran, Vaidyanath, Arun, Vyas, Kapil, Ling Yang, Jain, Manish, Chang, Kun-Yung Ken, Xingchao Yuan

Volltext

A 0.4mW/Gb/s 16Gb/s near-ground receiver front-end with replica transconductance termination calibration von Kaviani, K., Amirkhany, A., Huang, C., Le, P., Madden, C., Saito, K., Sano, K., Murugan, V., Beyene, W., Chang, K., Yuan, C.

Volltext

A 27-Gb/s, 0.41-mW/Gb/s 1-tap predictive decision feedback equalizer in 40-nm low-power CMOS von Kaviani, K., Hossain, M., Nazari, M. H., Heaton, F., Jihong Ren, Zerbe, J.

Volltext

A multichannel pipeline analog-to-digital converter for an integrated 3-D ultrasound imaging system von Kaviani, K., Oralkan, O., Khuri-Yakub, P., Wooley, B.A.

Volltext

A 4.1pJ/b 16Gb/s coded differential bidirectional parallel electrical link von Amirkhany, A., Kaviani, K., Abbasfar, A., Shuaeb, F., Beyene, W., Hoshino, C., Madden, C., Ken Chang, Yuan, C.

Volltext

A 6.4Gb/s near-ground single-ended transceiver for dual-rank DIMM memory interface systems von Kaviani, K., Bucher, M., Su, B., Daly, B., Stonecypher, B., Dettloff, W., Stone, T., Prabhu, K., Venkatesan, P. K., Heaton, F., Kollipara, R., Yi Lu, Madden, C. J., Eble, J., Lei Luo, Nhat Nguyen

Volltext

A 6.4/3.2/1.6 Gb/s low power interface with all digital clock multiplier for on-the-fly rate switching von Hossain, M., Kaviani, K., Daly, B., Shirasgaonkar, M., Dettloff, W., Stone, T., Prabhu, K., Tsang, B., Eble, J., Zerbe, J.

Volltext

OPTIMIZING POWER IN A MEMORY DEVICE von Kaviani, Kambiz, Aquil, Farrukh, Ware, Frederick A, Patil, Dinesh, Amirkhany, Amir

Volltext bestellen

Optimizing power in a memory device von Kaviani, Kambiz, Aquil, Farrukh, Ware, Frederick A, Patil, Dinesh, Amirkhany, Amir

Volltext bestellen

SOI design for a high-performance IO interface von Ken Chang, Ting Wu, Kaviani, K., Jung-Hoon Chun

Volltext

Clocking circuits for a 16Gb/s memory interface von Ting Wu, Xudong Shi, Kaviani, K., Haechang Lee, Jung-Hoon Chun, Chin, T.J., Jie Shen, Perego, R., Chang, K.

Volltext

OPTIMIZING POWER IN A MEMORY DEVICE von Kaviani, Kambiz, Aquil, Farrukh, Ware, Frederick A, Patil, Dinesh, Amirkhany, Amir

Volltext bestellen

Clocking and circuit design for a parallel I/O on a first-generation CELL processor von Ken Chang, Pamarti, S., Kaviani, K., Alon, E., Xudong Shi, Chin, T.J., Jie Shen, Yip, G., Madden, C., Schmitt, R., Yuan, C., Assaderaghi, F., Horowitz, M.

Volltext