A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration von Chih-Wei Yao, Ronghua Ni, Chung Lau, Wanghua Wu, Godbole, Kunal, Yongrong Zuo, Sangsoo Ko, Nam-Seog Kim, Sangwook Han, Ikkyun Jo, Joonhee Lee, Juyoung Han, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, Sang Won Son, Cho, Thomas Byunghak

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Accurate Extraction of Effective Gate Resistance in RF MOSFET von Jo, Ikkyun, Matsuoka, Toshimasa

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RF front-end architecture for a triple-band CMOS GPS receiver von Jo, Ikkyun, Bae, Jungnam, Matsuoka, Toshimasa, Ebinuma, Takuji

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A 14-nm 0.14-ps rms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration von Yao, Chih-Wei, Ni, Ronghua, Lau, Chung, Wu, Wanghua, Godbole, Kunal, Zuo, Yongrong, Ko, Sangsoo, Kim, Nam-Seog, Han, Sangwook, Jo, Ikkyun, Lee, Joonhee, Han, Juyoung, Kwon, Daehyeon, Kim, Chulho, Kim, Shinwoong, Son, Sang Won, Cho, Thomas Byunghak

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A Design of 0.7-V 400-MHz Digitally-Controlled Oscillator von BAE, Jungnam, RADHAPURAM, Saichandrateja, JO, Ikkyun, KIHARA, Takao, MATSUOKA, Toshimasa

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A Design of 0.7-V 400-MHz All-Digital Phase-Locked Loop for Implantable Biomedical Devices von BAE, Jungnam, RADHAPURAM, Saichandrateja, JO, Ikkyun, WANG, Weimin, KIHARA, Takao, MATSUOKA, Toshimasa

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A Subthreshold Low-Voltage Low-Phase-Noise CMOS LC-VCO with Resistive Biasing von Bae, Jungnam, Radhapuram, Saichandrateja, Jo, Ikkyun, Kihara, Takao, Matsuoka, Toshimasa

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A Design of Delta-Sigma-Modulator-Based Digitally-Controlled Oscillator with Dynamic Element Matching von Jungnam BAE, Saichandrateja RADHAPURAM, Ikkyun JO

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