Top-down and sensitive indium oxide nanoribbon field effect transistor biosensor chips integrated with on-chip gate electrodes toward point of care applications von Aroonyadet, N, Jeamsaksiri, W, Wisitsoraat, A, Tuantranont, A

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Silicon microchannel frames for high-energy physics experiments von Poonsawat, W., Supadech, J., Klunngien, N., Jeamsaksiri, W., Ritjoho, N., Laojamnongwong, N., Mapelli, A., Francescon, A., Alvarez Feito, D., Kobdaj, C.

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Resistivity profile of epitaxial layer for the new ALICE ITS sensor von Prabket, J., Poonsawat, W., Kobdaj, C., Naeosuphap, S., Yan, Y., Jeamsaksiri, W., Yamwong, W., Chaowicharat, E., Hruanun, C., Poyai, A.

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Durable nitrate sensor by surface modification von Chaisriratanakul, W., Bunjongpru, W., Jeamsaksiri, W., Srisuwan, A., Porntheeraphat, S., Chaowicharat, E., Hruanun, C., Poyai, A., Promyothin, D., Nukeaw, J.

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A 5-GHz fully integrated ESD-protected low-noise amplifier in 90-nm RF CMOS von Linten, D., Thijs, S., Natarajan, M.I., Wambacq, P., Jeamsaksiri, W., Ramos, J., Mercha, A., Jenei, S., Donnay, S., Decoutere, S.

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Very low drift and high sensitivity of nanocrystal-TiO2 sensing membrane on pH-ISFET fabricated by CMOS compatible process von Bunjongpru, W., Sungthong, A., Porntheeraphat, S., Rayanasukha, Y., Pankiew, A., Jeamsaksiri, W., Srisuwan, A., Chaisriratanakul, W., Chaowicharat, E., Klunngien, N., Hruanun, C., Poyai, A., Nukeaw, J.

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Low-power voltage-controlled oscillators in 90-nm CMOS using high-quality thin-film postprocessed inductors von Linten, D., Xiao Sun, Carchon, G., Jeamsaksiri, W., Mercha, A., Ramos, J., Jenei, S., Wambacq, P., Dehan, M., Aspemyr, L., Scholten, A.J., Decoutere, S., Donnay, S., De Raedt, W.

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Gate-source-drain architecture impact on DC and RF performance of sub-100-nm elevated source/drain NMOS transistors von Jeamsaksiri, W., Jurczak, M., Grau, L., Linten, D., Augendre, E., De Potter, M., Rooyackers, R., Wambacq, P., Badenes, G.

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Optimised n-channel Si/SiGe HFETs design for VTH shift immunity von Jeamsaksiri, W, Velázquez, J.E, Fobelets, K

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Comparison of sub-micron Si:SiGe heterojunction nFETs to Si nMOSFET in present-day technologies von Fobelets, K., Jeamsaksiri, W., Papavasilliou, C., Vilches, T., Gaspari, V., Velazquez-Perez, J.E., Michelakis, K., Hackbarth, T., König, U.

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Implementation of plug-and-play ESD protection in 5.5 GHz 90 nm RF CMOS LNAs—Concepts, constraints and solutions von Thijs, S., Natarajan, M.I., Linten, D., Jeamsaksiri, W., Daenen, T., Degraeve, R., Scholten, Andries, Decoutere, S., Groeseneken, G.

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A low-cost 90nm RF-CMOS platform for record RF circuit performance von Jeamsaksiri, W., Linten, D., Thijs, S., Carchon, G., Ramos, J., Mercha, A., Sun, X., Soussan, P., Dehan, M., Chiarella, T., Venegas, R., Subramanian, V., Scholten, A., Wambacq, P., Velghe, R., Mannaert, G., Heylen, N., Verbeeck, R., Boullart, W., Heyvaert, T., Natarajan, M.I., Groeseneken, G., Debusschere, I., Biesemans, S., Decoutere, S.

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Design-driven optimisation of a 90 nm RF CMOS process by use of elevated source/drain von Linten, D., Thijs, S., Jeamsaksiri, W., Natarajan, M.I., De Heyn, V., Vassilev, V., Groeseneken, G., Scholten, A.J., Badenes, G., Jurczak, M., Decoutere, S., Donnay, S., Wambacq, P.

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Chemical Resistant Improvement of Natural Rubber and Nitrile Gloves by Coating with Hydrophobic Film von Atthi, N., Nimittrakoolchai, O., Jeamsaksiri, W., Supothina, Sitthisuntorn

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An Effect of Viscosity of Coating Materials on Silicon Micro-Patterning Arrays for Superhydrophobic Surface von Supadech, J., Poyai, Amporn, Atthi, N., Nimittrakoolchai, O., Jeamsaksiri, W., Pankiew, A., Hruanun, C., Supothina, Sitthisuntorn

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Elevated Co-Silicide for sub-100nm High Performance and RF CMOS von Jurczak, M., de Potter, M., Rooyackers, R., Jeamsaksiri, W., Redolfi, A., Grau, L., Lauwers, A., Lindsay, R., Peytier, I., Augendre, E., Badenes, G.

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Implementation of plug-and-play ESD protection in 5.5GHz 90nm RF CMOS LNAs—Concepts, constraints and solutions von Thijs, S., Natarajan, M.I., Linten, D., Jeamsaksiri, W., Daenen, T., Degraeve, R., Scholten, Andries, Decoutere, S., Groeseneken, G.

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Gate-source-drain architecture impact on DC and RF performance of sub-100-nm elevated source/drain NMOS transistors von Jeamsaksiri, W, Jurczak, M, Grau, L, Linten, D, Augendre, E, De Potter, M, Rooyackers, R, Wambacq, P, Badenes, G

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Impact of scaling on analog/RF CMOS performance von Mercha, A., Jeamsaksiri, W., Ramos, J., Jenei, S., Decoutere, S., Linten, D., Wambacq, P.

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Optimal frequency range selection for full C-V characterization above 45MHz for ultra thin (1.2-nm) nitrided oxide MOSFETs von Jeamsaksiri, W., Mercha, A., Ramos, J., Decoutere, S., Cubaynes, F.N.

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